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Topic Review
Delay Line Memory
Delay line memory is a form of computer memory, now obsolete, that was used on some of the earliest digital computers. Like many modern forms of electronic computer memory, delay line memory was a refreshable memory, but as opposed to modern random-access memory, delay line memory was sequential-access. Analog delay line technology had been used since the 1920s to delay the propagation of analog signals. When a delay line is used as a memory device, an amplifier and a pulse shaper are connected between the output of the delay line and the input. These devices recirculate the signals from the output back into the input, creating a loop that maintains the signal as long as power is applied. The shaper ensures the pulses remain well-formed, removing any degradation due to losses in the medium. The memory capacity is determined by dividing the time taken to transmit one bit into the time it takes for data to circulate through the delay line. Early delay-line memory systems had capacities of a few thousand bits, with recirculation times measured in microseconds. To read or write a particular bit stored in such a memory, it is necessary to wait for that bit to circulate through the delay line into the electronics. The delay to read or write any particular bit is no longer than the recirculation time. Use of a delay line for a computer memory was invented by J. Presper Eckert in the mid-1940s for use in computers such as the EDVAC and the UNIVAC I. Eckert and John Mauchly applied for a patent for a delay line memory system on October 31, 1947; the patent was issued in 1953. This patent focused on mercury delay lines, but it also discussed delay lines made of strings of inductors and capacitors, magnetostrictive delay lines, and delay lines built using rotating disks to transfer data to a read head at one point on the circumference from a write head elsewhere around the circumference.
  • 629
  • 01 Dec 2022
Topic Review
Design and Development of the Gas Detection Platform
A gas detection platform was constructed using commercial sensors and embedded boards, and experimental data were collected in a hood environment such as used in chemical experiments. Electronic devices and data analysis procedures must be specifically tailored to develop an electronic olfactory system. 
  • 79
  • 12 Jan 2024
Biography
Dharma Prakash Agrawal
Professor Dharma P. Agrawal, our beloved friend, mentor, and Editor-in-Chief of Journal of Sensor and Actuator Networks, passed away on 15 February 2021. Professor Agrawal was a renowned computer scientist who specialized in Wireless Networks and Communications and Computer Architecture. Since 1998, he had been the Ohio Board of Regents Distinguished Professor of Electrical Engineering and Compu
  • 318
  • 01 Sep 2022
Topic Review
Digital Twin Applications
Industrial Digital Twin (IDT) systems integrate physical and virtual data throughout a product life cycle.
  • 595
  • 05 May 2022
Topic Review
Distributed and Localisation System for Crude Oil Pipelines
Crude oil leakages and spills (OLS) are some of the problems attributed to pipeline failures in the oil and gas industry’s midstream sector. Consequently, they are monitored via several leakage detection and localisation techniques (LDTs) comprising classical methods and, recently, Internet of Things (IoT)-based systems via wireless sensor networks (WSNs).
  • 263
  • 17 May 2023
Topic Review
Dynamic Branch Prediction in an Intel High-Performance Processor
Power and energy efficiency are among the most crucial requirements in high-performance and other computing platforms. Extensive experimental methods and procedures were used to assess the power and energy efficiency of fundamental hardware building blocks inside a typical high-performance CPU, focusing on the dynamic branch predictor (DBP).
  • 173
  • 01 Aug 2023
Topic Review
Dynamic Distributed Intelligence Architecture for Human Activity Recognition
A wide range of applications, including sports and healthcare, use human activity recognition (HAR). The Internet of Things (IoT), using cloud systems, offers enormous resources but produces high delays and huge amounts of traffic. Researchers propose a distributed intelligence and dynamic HAR architecture using smart IoT devices, edge devices, and cloud computing. These systems were used to train models, store results, and process real-time predictions. Wearable sensors and smartphones were deployed on the human body to detect activities from three positions; accelerometer and gyroscope parameters were utilized to recognize activities. A dynamic selection of models was used, depending on the availability of the data and the mobility of the users.
  • 97
  • 12 Jan 2024
Topic Review
Electrochemical Random-Access Memory
Electrochemical Random-Access Memory (ECRAM) is a type of non-volatile memory (NVM) with multiple levels per cell (MLC) designed for deep learning analog acceleration. An ECRAM cell is a three-terminal device composed of a conductive channel, an insulating electrolyte, an ionic reservoir, and metal contacts. The resistance of the channel is modulated by ionic exchange at the interface between the channel and the electrolyte upon application of an electric field. The charge-transfer process allows both for state retention in the absence of applied power, and for programming of multiple distinct levels, both differentiating ECRAM operation from the one of a field-effect transistor (FET). The write operation is deterministic and can result in symmetrical potentiation and depression, making ECRAM arrays attractive for acting as artificial synaptic weights in physical implementations of artificial neural networks (ANN). The technology challenges include open circuit potential (OCP) and semiconductor foundry compatibility associated with energy materials. Universities, government laboratories, and corporate research teams have contributed to the development of ECRAM for analog computing. Notably, Sandia National Laboratories designed a lithium-based cell inspired by solid-state battery materials, Stanford University built an organic proton-based cell, and International Business Machines (IBM) demonstrated in-memory selector-free parallel programming for a logistic regression task in an array of metal-oxide ECRAM designed for insertion in the back end of line (BEOL).
  • 772
  • 17 Nov 2022
Topic Review
Embedded Brain Computer Interface
We attempt to summarize the last two decades of embedded Brain-Computer Interface mostly because of the electroencephalography influence on these systems. Numerous noninvasive EBCIs have been developed, described, and tested. Noninvasive nature of the EEG-based BCIs made them the most popular BCI systems.
  • 871
  • 15 Jul 2021
Topic Review
Embedded Machine Learning
Embedded machine learning (EML) can be applied in the areas of accurate computer vision schemes, reliable speech recognition, innovative healthcare, robotics, and more. However, there exists a critical drawback in the efficient implementation of ML algorithms targeting embedded applications. Machine learning algorithms are generally computationally and memory intensive, making them unsuitable for resource-constrained environments such as embedded and mobile devices. In order to efficiently implement these compute and memory-intensive algorithms within the embedded and mobile computing space, innovative optimization techniques are required at the algorithm and hardware levels. 
  • 779
  • 01 Nov 2021
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