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Topic Review
Hardware Heritage
Hardware heritage is the history of both hardware and software. Human knowledge, experience, and skills are translated into computation models (binary code) in software and computer environment (‘digital ecosystem’). The history of software is a history of how different communities of practitioners ‘put their world into a computer’.
  • 795
  • 23 Sep 2021
Topic Review
Microcontroller Unit-Based Wireless Sensor Network Nodes
Despite numerous research efforts in the fast-growing field of wireless sensor devices, energy consumption remains a challenge that limits the lifetime of wireless sensor networks (WSNs). The Internet-of-Things (IoT) technology utilizes WSNs for providing an efficient sensing and communication infrastructure. Thus, a comparison of the existing wireless sensor nodes is crucial. Of particular interest are the advances in the recent MCU-based wireless sensor node platforms, which have become diverse and fairly advanced in relation to the currently available commercial WSN platforms.
  • 795
  • 28 Nov 2022
Topic Review
Embedded Machine Learning
Embedded machine learning (EML) can be applied in the areas of accurate computer vision schemes, reliable speech recognition, innovative healthcare, robotics, and more. However, there exists a critical drawback in the efficient implementation of ML algorithms targeting embedded applications. Machine learning algorithms are generally computationally and memory intensive, making them unsuitable for resource-constrained environments such as embedded and mobile devices. In order to efficiently implement these compute and memory-intensive algorithms within the embedded and mobile computing space, innovative optimization techniques are required at the algorithm and hardware levels. 
  • 788
  • 01 Nov 2021
Topic Review
Wireless Technologies for Social Distancing in COVID-19 Pandemic
So-called “social distance” refers to measures that work to prevent disease spread through minimizing human physical contact frequency and intensity, including the closure of public spaces (e.g., schools and offices), avoiding large crowds, and maintaining a safe distance between individuals. Because it reduces the likelihood that an infected person would transmit the illness to a healthy individual, social distance reduces the disease’s progression and impact. During the early stages of a pandemic, social distancing techniques can play a crucial role in decreasing the infection rate and delaying the disease’s peak. Consequently, the load on healthcare systems is reduced, and death rates are reduced. The concept of social distancing may not be as easy as physical distancing, given the rising complexity of viruses and the fast expansion of social interaction and globalization. It encompasses numerous non-pharmaceutical activities or efforts designed to reduce the spread of infectious diseases, including monitoring, detection, and alerting people. Different technologies can assist in maintaining a safe distance (e.g., 1.5 m) between persons in the adopted scenarios. There are a number of wireless and similar technologies that can be used to monitor people and public locations in real-time.
  • 750
  • 25 Mar 2022
Topic Review
ADM-3A
The ADM-3A was an influential early video display terminal, introduced in 1976. It was manufactured by Lear Siegler and had a 12-inch screen displaying 12 or 24 lines of 80 characters. It set a new industry low single unit price of $995. Its "dumb terminal" nickname came from some of the original trade publication advertisements. It quickly became commercially successful because of the rapid increase of computer communications speeds, and because of new minicomputer systems released to the market which required inexpensive operator consoles.
  • 730
  • 29 Nov 2022
Topic Review
HPE BladeSystem
BladeSystem is a line of blade server machines from Hewlett Packard Enterprise (Formerly Hewlett-Packard) that was introduced in June 2006. The BladeSystem forms part of the HPE Converged Systems platform, which use a common converged infrastructure architecture for server, storage, and networking products. Designed for enterprise installations of 100 to more than 1,000 Virtual machines, the HP ConvergedSystem 700 is configured with BladeSystem servers. When managing a software-defined data center, a System administrator can perform automated lifecycle management for BladeSystems using HPE OneView for converged infrastructure management. The BladeSystem allows users to build a high density system, up to 128 servers in each rack.
  • 718
  • 28 Sep 2022
Topic Review
Blockchain-Enabled Vehicular Ad Hoc Networks
Within the paradigm of distributed ledger technology (DLT), the communication models and practices for vehicular ad hoc networks (VANETs) have been revolutionized. VANETs introduce a network of self-organizing vehicles that act as mobile nodes. They confine the communication between vehicles and roadside units as V2V and V2R. They assists drivers in avoiding collisions, picking the shortest route on the basis of traffic optimization, identifying tolls and the nearest fuel stations, and in enhancing the safety of assets and lives. They facilitate the communication of vehicles across the network for real-time data transmission. They improve the road safety mechanism and provide instant alerts or information in order to concern the authorities in cases of emergency situations, such as rollovers, accidents, etc. The existing architecture of VANETs also exposes vulnerabilities, such as data sniffing, impersonation, and ransomware attacks.
  • 700
  • 07 Apr 2022
Topic Review
Delay Line Memory
Delay line memory is a form of computer memory, now obsolete, that was used on some of the earliest digital computers. Like many modern forms of electronic computer memory, delay line memory was a refreshable memory, but as opposed to modern random-access memory, delay line memory was sequential-access. Analog delay line technology had been used since the 1920s to delay the propagation of analog signals. When a delay line is used as a memory device, an amplifier and a pulse shaper are connected between the output of the delay line and the input. These devices recirculate the signals from the output back into the input, creating a loop that maintains the signal as long as power is applied. The shaper ensures the pulses remain well-formed, removing any degradation due to losses in the medium. The memory capacity is determined by dividing the time taken to transmit one bit into the time it takes for data to circulate through the delay line. Early delay-line memory systems had capacities of a few thousand bits, with recirculation times measured in microseconds. To read or write a particular bit stored in such a memory, it is necessary to wait for that bit to circulate through the delay line into the electronics. The delay to read or write any particular bit is no longer than the recirculation time. Use of a delay line for a computer memory was invented by J. Presper Eckert in the mid-1940s for use in computers such as the EDVAC and the UNIVAC I. Eckert and John Mauchly applied for a patent for a delay line memory system on October 31, 1947; the patent was issued in 1953. This patent focused on mercury delay lines, but it also discussed delay lines made of strings of inductors and capacitors, magnetostrictive delay lines, and delay lines built using rotating disks to transfer data to a read head at one point on the circumference from a write head elsewhere around the circumference.
  • 692
  • 01 Dec 2022
Topic Review
Gate-Level Static Approximate Adders
This work compares and analyzes static approximate adders which are suitable for FPGA and ASIC type implementations. We consider many static approximate adders and evaluate their performance with respect to a digital image processing application using standard figures of merit such as peak signal to noise ratio and structural similarity index metric. We provide the error metrics of approximate adders, and the design metrics of accurate and approximate adders corresponding to FPGA and ASIC type implementations. For the FPGA implementation, we considered a Xilinx Artix-7 FPGA, and for an ASIC type implementation, we considered a 32-28 nm CMOS standard digital cell library. While the inferences from this work could serve as a useful reference to determine an optimum static approximate adder for a practical application, in particular, we found approximate adders HOAANED, HERLOA and M-HERLOA to be preferable.
  • 690
  • 14 Dec 2021
Topic Review
Fog and IoT Driven Healthcare
Technological advancements have made it possible to monitor, diagnose, and treat patients remotely. The vital signs of patients can now be collected with the help of Internet of Things (IoT)-based wearable sensor devices and then uploaded on to a fog server for processing and access by physicians for recommending prescriptions and treating patients through the Internet of Medical Things (IoMT) devices. 
  • 686
  • 07 Sep 2022
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