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Sayed, K. Multilevel DC-AC Inverters (MLIs) Topologies. Encyclopedia. Available online: (accessed on 14 April 2024).
Sayed K. Multilevel DC-AC Inverters (MLIs) Topologies. Encyclopedia. Available at: Accessed April 14, 2024.
Sayed, Khairy. "Multilevel DC-AC Inverters (MLIs) Topologies" Encyclopedia, (accessed April 14, 2024).
Sayed, K. (2022, February 26). Multilevel DC-AC Inverters (MLIs) Topologies. In Encyclopedia.
Sayed, Khairy. "Multilevel DC-AC Inverters (MLIs) Topologies." Encyclopedia. Web. 26 February, 2022.
Multilevel DC-AC Inverters (MLIs) Topologies

Achieving a soft-switching operation is a challenging task in the development of multilevel inverters for EV motor drives. Nevertheless, multilevel inverters can present several exclusive advantages that are mainly beneficial to EVs. To be exact, they can produce nearby-sinusoidal voltage waveforms with only fundamental frequency, producing smaller harmonic contents in the output current and voltage, reduced power losses, produce almost no EMI, are appropriate for high rating motor drives, and adequate for BEVs where floating DC power sources are logically obtainable. One can overcome the difficulties of the traditional two-level inverter (TLIs). Thus, the expansion of multilevel inverters for EVs can be rapidly accelerated. Multilevel AC output waveforms can be produced by MLI circuit arrangements. Multilevel DC-AC inverters topologies can be classified as classical and advanced inverters.

DC-AC power converters electric vehicle multi-level inverters soft-switching techniques switching losses power electronics power losses

1. Classical Multilevel DC-AC Inverter (MLI) Topologies

For a better understanding of the new advances in MLI topologies, it is necessary to understand classical MLI topologies, which have been reported in the recent literature [1][2]. Three different basic MLI topologies are regularly developed: diode-clamped MLI, flying-capacitors MLI, cascaded H-bridges MLI [3][4][5][6][7]. The following summarizes the different types of multilevel inverters:

2. Diode-Clamped Multilevel Inverter Topology

The Diode-Clamped Multilevel Inverter (DC-MLI) topology proposed by [8][9][10] has been used in several experimental works and published articles [11][12][13][14][15][16][17][18][19][20]. These studies have presented results regarding three-, four-, five-, and six-level DC-MLIs. Another application is high-voltage grid applications, where the PV is the supply power to input the DC-bus in addition to variable-speed motor drives [1][21].
A three-phase three-level Diode-Clamped-MLI topology is displayed in Figure 1. Each of the three-phase inverter outputs shares the DC-bus voltage that has been split into five partitions that are clamped by either of the two extra diodes over four DC bus capacitors. The capacitors are C1 to C4. The two diodes clamp the voltage across the switch to the half level of the DC-bus voltage. The middle points of the C2 and C3 capacitors comprise the neutral point of the inverter, and the output voltage has five voltage values referring to the neutral point. The near AC (multilevel/staircase) output voltage signal is synthesized from some inner voltage levels through a number of switches that are connected in series and switched at a low-frequency control.
Figure 1. Three-phase three-level diode-clamped multilevel inverter (DC-MLI) for EV motor drive.
The main advantages of the DC-MLI topology are as follows [1]:
  • Does not require a separate DC supply per bridge leg.
  • A combination of DC-link capacitors could be charged together.
  • Fewer number of switching devices and capacitors as compared with other conventional topologies.
  • The switching losses in the power switches are reduced owing to low switch commutation. Consequently, the efficiency is higher, especially for operation at the fundamental frequency.
The disadvantages of the DC-MLI topology can be presented as follows [11][12][13][14][15][16][17]:
  • Reverse recovery problem of clamping diodes; that is, more conduction losses in IGBTs.
  • Switching at the fundamental frequency will cause an increase in the current and voltage THD.
  • Unequal distribution of power losses among semiconductor devices that produce an asymmetrical temperature distribution.
  • Increasing the number of clamping diodes increases the volume and cost of the inverter topology [18][19][20][22][23][24].

3. Flying-Capacitor Multilevel Inverter

The flying-capacitor multilevel inverter (FC-MLI) topology was presented in 1992 as a substitute topology to the DC-MLI in [25][26][27]. A five-level three-phase FC-MLI topology is shown in Figure 2. The configuration of this circuit is similar to that of DC-MLI, but DC-side capacitors are placed in a ladder form as a replacement for the clamping diodes [28][29][30][31]. The DC-bus voltage is subdivided by a number of capacitors into various voltage levels with a middle neutral point. Consequently, several inner voltage levels exist at different magnitudes, which are clamped by means of clamping capacitors. The multilevel AC voltages of the FC-MLI are synthesized from several levels of inner voltage through several series-connected switches. The associated switches are controlled in a suitable gate-pulse sequence at a proper switching frequency [12][13][15]. The main advantages of the FC-MLI topology are as follows [1]:
Figure 2. Three-phase three-levels flying-capacitor multilevel inverter (FC-MLI) topology for EV motor drive.
  • Requires only one DC source.
  • The voltage synthesized in FC-MLI has more resilience than a DC-MLI.
  • Ability to control active and reactive power, which can be used for capacitor balancing.
  • A considerable number of clamping capacitors can be used as a capacitor bank that supports a short backup power supply for a short period in the case of short-time power outages.
The disadvantages of the FC-MLI topology can be presented as follows [1]:
  • The balancing problem of capacitors.
  • The increase in the level number will impede the correct charging and discharging of the capacitors.
  • Large number of capacitors increase the size and cost of inverter.
Figure 2 shows the three-phase three-level flying-capacitor multilevel inverter (FC-MLI) topology. The number of voltage-levels, and thus the power quality of the FC-MLI inverter, can be further increased by using the full-binary combination schema [32].

4. Cascaded H-Bridge Multilevel Inverter Topology

A cascaded H-bridge multilevel inverter (CHB-MLI) is an alternative topology for multilevel inverters that require fewer power semiconductor devices as compared with the topologies described earlier. The CHB-MLI topology is based on the number of H-bridges connected in series with separate DC power sources [33][34]Figure 3 shows a five-level three-phase CHB-MLI topology. Meanwhile, the terminals of the H-bridge output are in series connection, and the DC power sources must be isolated from each other. Because of this attribute, CHB-MLI has also been introduced for renewable energy sources, such as photovoltaic arrays and fuel cell stacks, to interface with the AC power grid [35][36][37][38][33], because separate DC sources are required in such applications [1], to achieve higher levels [3][35][34][39]. Various classical DC-AC inverters are completed in Table 1.
Figure 3. Three-phase three-level topology of cascaded H-bridge multilevel inverter (CHB–MLI) for EV motor drive.
Table 1. Comparison of various classical multilevel DC-AC inverters.
Topology Number of
Voltage Sources
Switches Antiparallel
Capacitors Balancing
Voltage Levels
DC–MLI 1 12 12 6 0 2 3
FC–MLI 1 12 12 0 3 2 3
CHB–MLI 3 12 12 0 0 0 3
The main advantages of the CHB–MLI topology are as follows [1][12][15][17]:
  • The number of output voltage levels is equal to twice the number of DC sources plus one (m = 2 s +1).
  • All the power devices operate at the lower switching frequency, resulting in lower switching losses.
  • In CHB–MLI, a low rated-voltage is required for the power switch. This results in a lower dv/dt and lower electromagnetic interference (EMI).
The disadvantages of the CHB-MLI topology can be presented as follows [1]:
  • To achieve near sinusoidal output voltages with minimum THD, numerous components are required.
  • A high number of voltage levels require many separate DC sources, switching devices, and power diodes to construct the circuit.
A cascaded H-bridge multilevel PWM inverter that comprises four floating DC sources for each phase is shown in Figure 3. This inverter is not only specialized by the exclusive benefits of multilevel PWM inverters but also by using identical units of the H-bridge inverter, thus improving the manufacturability and modularity of the system [40].
Conventional multilevel PWM inverter circuits have a special benefit over two-level PWM inverters in terms of low THD, low switching losses, and higher efficiency. While traditional multilevel DC-AC inverters are efficient, they are Suffering from too many components. This increases the overall cost and volume of the inverter and requires a complicated control circuit. Hence, it is important to look at various MLI topologies with reduced components, simpler circuit structure, direct control procedures, and simpler control circuits.


  1. Luo, F.; Ye, H. Advanced DC/AC Inverters: Applications in Renewable Energy (Power Electronics, Electrical Engineering, Energy, and Nanotechnology; CRC Press: Boca Raton, FL, USA, 2017.
  2. Gupta, K.; Ranjan, A.; Bhatnagar, P.; Sahu, L.; Jain, S. Multilevel inverter topologies with reduced device count: A review. IEEE Trans. Power Electron. 2015, 31, 135–151.
  3. Rodriguez, J.; Lai, J.S.; Peng, F.Z. Multilevel inverters: A survey of topologies, controls, and applications. IEEE Trans. Ind. Electron. 2002, 49, 724–738.
  4. Kadir, M.; Mekhilef, S.; Ping, H. Voltage vector control of a hybrid three-stage 18-level inverter by vector decomposition. IET Power Electron. 2010, 3, 601–611.
  5. Axelrod, B.; Berkovich, Y.; Ioinovici, A. A cascade boost-switched-capacitor-converter—Two level inverter with an optimized multilevel output waveform. IEEE Trans. Circuits Syst. I Regul. Pap. 2005, 52, 2763–2770.
  6. Colak, I.; Kabalci, E.; Bayindir, B.R. Review of multilevel voltage source inverter topologies and control schemes’. Energy Convers. Manag. 2011, 52, 1114–1128.
  7. Khoshkbar-Sadigh, A.; Dargahi, V.; Corzine, K. New Flying-Capacitor-Based Multilevel Converter With Optimized Number of Switches and Capacitors for Renewable Energy Integration. IEEE Trans. Energy Convers. 2016, 31, 846–859.
  8. Mecke, R. Multilevel NPC inverter for low-voltage applications. In Proceedings of the 2011-14th European Conference on Power Electronics and Applications (EPE 2011), Birmingham, UK, 30 August–1 September 2011; p. 1.
  9. Nabae, I.; Akagi, H. A new neutral-point-clamped PWM inverter. IEEE Trans. Ind. Appl. 1981, 5, 518–523.
  10. De, S.; Banerjee, D.; Gopakumar, K.; Ramchand, R.; Patel, C. Multilevel inverters for low-power application. IET Power Electron. 2011, 4, 384–392.
  11. Peng, F.; McKeever, J.; Adams, D. Cascade multilevel inverters for utility applications. In Proceedings of the 23rd International Conference on Industrial Electonics, Control and Instrumentation, New Orleans, LA, USA, 14 November 1997.
  12. Kouro, S.; Malinowski, M.; Gopakumar, K.; Pou, J.; Franquelo, L.; Wu, B.; Rodriguez, J.; Pérez, M.; Leon, J. Recent advances and industrial applications of Multilevel Converters. IEEE Trans. Ind. Electron. 2010, 57, 2553–2580.
  13. Sayed, K.; Kassem, A.M. Sensorless Vector Controlled Three-Phase PWM Inverter-Fed Induction Motor Drive System With Auto-Tuning Estimation Of Machine Parameter Approach. Sohag Eng. J. 2021, 1, 34–48.
  14. Rodríguez, J.; Bernet, S.; Steimer, P.; Lizama, I. A survey on Neutral-Point-Clamped Inverters. IEEE Trans. Ind. Electron. 2009, 57, 2219–2230.
  15. Khomfoi, S.; Tolbert, L. Multilevel Power Converters, Power Electronics Handbook; University of Tennessee: Knoxville, TN, USA, 2007; p. 17.
  16. dos Santos, C.A.; Antunes, F.L.M. Losses comparison among carrier-based PWM modulation strategies in three-level neutral-point-clamped inverter. In Proceedings of the International Conference on Renewable Energies and Power Quality, Las Palmas de Gran Canaria, Spain, 13–15 April 2011; ICREPQ: Las Palmas de Gran Canaria, Spain, 2011.
  17. Rodríguez, J.; Bernet, S.; Wu, B.; Pontt, J.; Kouro, S. Multilevel voltage-source-converter topologies for industrial medium voltage drives. IEEE Trans. Ind. Electron. 2007, 54, 2930–2945.
  18. Joos, G.; Huang, X.; Ooi, B. Direct-coupled multilevel cascaded series VAR compensators. IEEE Trans. Ind. Appl. 1998, 34, 1156–1163.
  19. Tolbert, L.; Peng, F.; Habetler, T. Multilevel inverters for electric vehicle applications. In Proceedings of the IEEE Workshop on Power Electronics in Transportation, Dearborn, MI, USA, 22–23 October 1998.
  20. Bendre, A.; Krstic, S.; Meer, J.; Venkataramanan, G. Comparative evaluation of modulation algorithms for neutral point clamped converters. IEEE Trans. Ind. Appl. 2005, 41, 634–643.
  21. Rashid, M. SPICE for Power Electronics and Electric Power; CRC Press: Boca Raton, FL, USA, 2012.
  22. Tolbert, L.; Peng, F.; Cunnyngham, T.; Chiasson, J. Charge balance control schemes for a multilevel converter in hybrid electric vehicles. IEEE Trans. Ind. Electron. 2002, 49, 1058–1064.
  23. Çolak, I.; Kabalci, E. A review on inverter topologies and developments. In Proceedings of the Eleco’2008 Electrics, Electronics and Computer Engineering Symposium, Bursa, Turkey, 26–30 November 2008.
  24. Purkait, P.; Sriramakavacham, R. A new generalized space vector modulation algorithm for neutral-point-clamped multilevel converters. PIERS Online 2006, 2, 330–335.
  25. Meynard, T.; Foch, H. Multi-level conversion: High voltage choppers and voltage-source inverters. In Proceedings of the IEEE Power Electronics Specialists Conference, Toledo, Spain, 29 June–3 July 1992.
  26. Huang, J.; Corzine, K. Extended operation of flying capacitor multilevel inverters. In Proceedings of the Conference Record of the 2004 IEEE Industry Applications Conference, Seattle, WA, USA, 3–7 October 2004; Volume 2004, p. 813.
  27. He, L.; Cheng, C. A flying-capacitor-clamped five-level inverter based on bridge modular switched-capacitor topology. IEEE Trans. Ind. Electron. 2016, 63, 7814–7822.
  28. Trabelsi, M.; Vahedi, H.; Abu-Rub, H. Review on Single-DC-Source Multilevel Inverters: Topologies, Challenges, Industrial Applications, and Recommendations. IEEE Open J. Ind. Electron. Soc. 2021, 2, 112–127.
  29. Xu, L.; Agelidis, V. Active capacitor voltage control of flying capacitor multilevel converters. IEE Proc.-Electr. Power Appl. 2004, 151, 313–320.
  30. Feng, C.; Liang, J.; Agelidis, V.; Green, T. A multi-modular system based on parallel-connected multilevel flying capacitor converters controlled with fundamental frequency SPWM. In Proceedings of the IEEE 32nd Conference on Industrial Electronics, Paris, France, 6–10 November 2006; pp. 2360–2365.
  31. Song, B.; Kim, J.; Lai, J.; Seong, K.; Kim, H.; Park, S. A multilevel soft-switching inverter with inductor coupling. IEEE Trans. Ind. Appl. 2001, 37, 628–636.
  32. Kou, X.; Corzine, K.A.; Familiant, Y.L. Full binary combination schema for floating voltage source multilevel inverters. IEEE Trans. Power Electron. 2002, 17, 891–897.
  33. Hua, C.; Wu, C.; Chuang, C. Fully digital control of a 27-level cascade inverter with variable dc voltage sources. In Proceedings of the 2nd IEEE Conference on Industrial Electronics and Applications, Harbin, China, 23–25 May 2007; pp. 2441–2448.
  34. Panagis, P.; Stergiopoulos, F.; Marabeas, P.; Manias, S. Comparison of state of the art multilevel inverters. In Proceedings of the IEEE Annual Power Electronics Specialist Conference PESC ’08, Rhodes, Greece, 15–19 June 2008; pp. 4296–4301.
  35. Kuhn, H.; Rüger, N.; Mertens, A. Control strategy for a multilevel inverter with non-ideal dc sources. In Proceedings of the IEEE Power Electronics Specialists Conference, Orlando, FL, USA, 17–21 June 2007; pp. 632–638.
  36. Azli, N.; Choong, Y. Analysis of the performance of a three-phase cascaded h-bridge multilevel inverter. In Proceedings of the 1st International Power and Energy Conference, Putrajaya, Malaysia, 28–29 November 2006; pp. 405–410.
  37. Du, Z.; Tolbert, L.; Chiasson, J. Reduced switching frequency computed PWM method for multilevel converter control. In Proceedings of the 2005 IEEE 36th Power Electronics Specialists Conference, Dresden, Germany, 16 June 2005; pp. 2560–2564.
  38. Kocalmis, A.; Sunter, S. Simulation of a space vector PWM controller for a three-level voltage-fed inverter motor drive. In Proceedings of the 32nd Annual Conference of the IEEE Industrial Electronics Society, Paris, France, 6–10 November 2006; IECON: Paris, France, 2006; pp. 1915–1920.
  39. Hochgraf, C.; Lasseter, R.; Divan, D.; Lipo, T. Comparison of multilevel inverters for static VAR compensation. In Proceedings of the IEEE Industry Applications Society Annual Meeting, Denver, CO, USA, 2–6 October 1994; pp. 921–928.
  40. Tolbert, L.; Peng, F.; Habetler, T. Multilevel converters for large electric drives. IEEE Trans. Ind. Appl. 1999, 35, 36–44.
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