Certainly, we can track a history of developments of avalanche photodiodes (APDs) and silicon photomultipliers (SiPMs) based on non-planar p–n junctions from the very beginning of the era of semiconductor devices in the 1930s. Many materials (e.g., copper oxide, selenium, diamond, and others) were studied in the photoelectric effects and the feasibility of using them for point-contact and solid-state power rectifiers and diodes.
In the 1940s, silicon and germanium were found to be preferable materials in terms of photoelectric properties and material quality, impurity doping processes for positive (p-type) and negative (n-type) dopants were established, and the silicon photodiode based on a planar p–n junction—“light-sensitive electric device”—was invented by Russel Ohl 
. In the 1950s, photodiodes of various designs were studied at high reverse voltages, and the main high-field effects were observed, namely, Zener breakdown and avalanche multiplication up to breakdown or microplasma. The breakdown processes often appeared to be facilitated by and localized on some crystal lattice imperfections (e.g., scratches, dislocations, point defects, impurities).
In fact, there was no clear distinction between these processes and their origins, as noted in 
: “at the time it was not possible to confirm if the avalanche at the location was due to an increased electric field due to nonuniformity of the dopant, carrier tunneling due to traps in the energy bands, band gap narrowing due to lattice distortion, or indeed large crystal misalignments”. Many efforts have been applied to benefit from highly sensitive photodetection with avalanche multiplication in photodiodes (they have become avalanche photodiodes since the invention of the APD by Jun-ichi Nishizawa in 1952 
2. Non-Planar APD and SiPM Designs
2.1. Spherical APD
The so-called “spherical avalanche diode” seems to be the first APD intentionally designed using a non-planar approach 
. The main idea of the design was to simultaneously achieve rather contradictory objectives:
Uniformity of an avalanche multiplication over the sensitive region at the cone tip in the space angle Ω;
Enhancement of an electric field at the cone tip to lower breakdown voltage;
Protection from edge breakdown without guard ring structures;
Reduction of an electric field at the surface of the silicon to lower dark current.
The spherical APD was manufactured with a radius of the p–n junction ≈ 2 μm and a distance between the cone and the surface ∼ 2–50 μm. An avalanche breakdown at the tip of the cone occurs at a voltage of 50 V (bulk silicon resistivity of 4 Ω·cm) or 85 V (bulk silicon resistivity of 12 Ω·cm). The APD can operate in both a proportional (linear) mode with a gain of ∼200 and a photon counting mode with a gain of ∼106 by detecting incident photons with a constant quantum yield within a small sensitive area of ∼50–80 μm2 around the cone with a radius ∼ 4–5 μm. Of course, the design features—backside illumination (BSI), large and deep etched cone, and small sensitive area—appeared to be complicated and impractical to move further with this design.
2.2. Metal-Resistor-Semiconductor APD
The Russian MRS APD evolved from a planar MOS APD first to a planar structure and shortly to a non-planar multichannel or micropixel structure 
. Multichannel MRS APD was formed by local inhomogeneities, i.e., n+ diffusion dots of a few micrometer size in a p–Si wafer covered by a thin resistive layer of silicon carbide SiC or polysilicon (marked as Si∗*
). The n+ dots (channels, micropixels) attract electrons by an enhanced electric field at the dot’s curvatures and prevent the spreading of the avalanche charge over the Si–SiC interface by lateral diffusion. An introduction of such artificial local inhomogeneities allows us to eliminate the influence of natural non-uniformity on the avalanche process and stabilize the parameters and reproducibility of the MRS APD. The resistive SiC layer atop the dots provides efficient quenching of the avalanche process in a Geiger mode with negative feedback and complement stabilization of the MRS APD operations against variability of the dot’s breakdown voltages. Low capacitance and low breakdown voltage were identified as the advantages of MRS APD relative to planar APD designs 
Certainly, the most impressive feature of the MRS APD was the unique combination of very high gain 104
and extremely low dispersion of the gain or excess noise factor due to local negative feedback. This feature breaks the McIntyre law of approximately linear dependence of the avalanche excess noise factor on the mean gain 
and results in an unprecedented photon number-resolving detection of multiphoton light pulses. The resolved pulse height histogram (also often called the photoelectron spectrum) of a few detected photons for the first time was observed in 
at 0 °C and confirmed at various temperatures including 293 °C in detailed studies 
However, comparable and even higher performance in photon number resolution and photon detection efficiency than MRS APD was achieved soon by the first planar SiPM developed by the MEPhI/Pulsar team in 2001 
utilizing a planar design invented by Z. Sadygov in 1996 
The non-planar MRS APDs were produced in the 1990s by the Russian Center for Perspective Technologies and Apparatus (CPTA) led by V. Golovin and were considered to be a promising development for some high-energy physics experiments (DESY, CERN CMS). In the early 2000s CPTA developed a new planar design of MRS APD (or SiPM or solid state photomultiplier, SSPM) where for the first time, planar p–n junctions of the pixels on the front surface were separated by deep trenches to suppress an optical crosstalk between pixels as well as to prevent an edge breakdown of the junction 
Thus, planar SiPM by MEPhI/Pulsar and CPTA substituted non-planar MRS APD because of higher PDE, lower DCR, lower optical crosstalk, and more reliable production and operation. Since the mid 2000s, planar SiPM has been globally recognized as a new photon-number-resolving avalanche detector of outstanding performance, and the planar SiPM modifications were developed by Hamamatsu 
, SensL 
, ST Microelectronics 
, FBK 
, Excelitas Technologies 
, and KETEK 
with various combinations of pixel separation by guard rings and trenches.
2.3. Micro-Well APD
To outperform both MRS APDs and planar SiPMs in geometric efficiency, therefore, in PDE, Z. Sadygov invented and developed a new original non-planar APD design: the micro-well APD 
. Front surface circuitry, quenching resistors, and metal wires for each pixel were completely excluded, providing a geometric efficiency of 100%. The avalanche regions were formed by n+ pixels of a few microns deeply buried in the p-type epitaxial layer. The n+ pixels enhance and focus the electric field like the hemispherical n+ diffusion dots of the MRS APD.
Moreover, the n+ pixels, being micro-wells for electrons in the energy band diagram, collect and trap multiplied electrons while their accumulated charge reduces the electric field and quenches the avalanche breakdown. The small size (low capacitance) and high density of the pixels up to 4·104
provide the potential to outperform planar SiPMs in the dynamic range. Indeed, micro-well APD showed record linearity in short-light pulse detection 
However, the peak PDE value of ∼35% appeared to be about twice as low as expected at the given quantum efficiency of 80%. Furthermore, micro-well APDs revealed a long pixel recovery time ∼300 μ
due to the slow relaxation of the accumulated charge in the micro-wells, eliminating their dynamic range for long light pulse detection.
2.4. Discrete Amplification APD
The discrete amplification APD (DAPD) was developed and produced by Amplification Technologies in the 2000s 
. DAPDs were based on the concept of solid state photomultiplier (SSPM) as a multichannel APD operated in Geiger mode with single electron negative feedback 
. DAPD is an array of avalanche amplification channels based on small spatially separated p–n junctions similar to MRS APD as discussed in 
In 2009, the DAPD design was implemented by InGaAs/InP heterostructures for the near-infrared (NIR) spectral range 
and appeared to be the first non-silicon SSPM simultaneously with the negative feedback APD (NFAD) developed by Princeton Lightwave 
2.5. Avalanche Drift Diode—Back Illumination Drift SiPM
Another approach has been used to achieve an ultimate geometric efficiency of 100% in an attempt to develop the back illumination drift (BID) SiPM. The BID SiPM was designed to combine the concepts of APD and the SDD, utilizing the main benefits of both devices. The SDD is designed to collect electrons from a large depleted volume by lateral drift into a small dot-shaped anode that defines a small capacitance of the SDD 
. The small capacitance was identified as a primary benefit of the SDD because it allows one to detect low-energy particles with a record threshold sensitivity 
Initially, the Max Planck Institute team proposed an SDD-inspired concept of the avalanche drift diode and modeled its structure and electric field distributions 
. In the next years, they adjusted the implantation profiles to optimize the collection and multiplication of signal electrons in the modified version of the avalanche drift diode, the BID SiPM 
The authors presumed that the BID SiPM advantages would be an unstructured thin entrance window with 100% geometric efficiency (fill factor), efficient collection of electrons into a high field region by lateral drift in the focused electric field, and high probability of Geiger breakdown (as only electrons trigger breakdown) and thus, very high PDE overall, as well as short pixel recovery time and low electronic noise due to small diode capacitance.
However, their main concern was an optical crosstalk in this design. Indeed, in the first test structures (made with front entrance windows for a while) the crosstalk effect was estimated to be approximately 54 secondary photons per avalanche event, resulting in a probability of crosstalk of 99.99% by simulation of BID SiPM operations 
. Faced with such a show-stopper, the team turned from BID SiPM to development of another type of SiPM with bulk integrated quench resistors (SiMPl concept) 
2.6. Nano-Multiplication-Region APD
The nano-multiplication-region (later called the nanopillar) avalanche photodiode (NAPD) was invented and developed by the Jet Propulsion Lab, NASA and the UCLA team in 2007 
The design looks like an advance of the ADD or BID SiPM concept toward an ultimately small multiplication region formed by the p–n junction in a nanopillar. Electrons are collected in the nanopillar (in fact, of about 0.1 μm diameter) by lateral drift in the focusing electric field, which is provided by vertical p+ anodes at the pixel borders.
The advantages of the NAPD were expected to be related to the nanoscale size of the multiplication region. The NAPD concept allows to reproduce an approach of so-called separated absorption and multiplication (SAM) APDs (typical for III–V compound materials): a large depleted volume absorbs photons and transfers signal electrons in a relatively low electric field, and the nanopillar p–n junction multiplies the electrons in a high confinement. In fact, a single-electron avalanche process could be localized in a few micrometers or less. As the breakdown is very sensitive to local electric field fluctuations, it is difficult to obtain uniformity of conventional planar-junction APDs and APD arrays, but the nanopillar design eliminates this problem and could be more reliable (e.g., similarly to MRS APD).
Possible reduction of a filed-enchanced DCR component in the NAPD could also be expected with respect to conventional APDs with a large high-filed avalanche region. The small size of the high-field avalanche region favors less field-enhanced dark generation, while the large area of the Si–SiO2 interface adjacent to the large sensitive volume with lateral charge transfer favors getting a larger surface contribution to the DCR. Therefore, the overall balance of these contributions could result in a higher DCR per active area compared to the planar APD designs.
The test NAPD samples were made on p-type silicon wafers with resistivity of 80 Ω·cm and with nano-pillar diameter of about 100 nm and height of 800 nm. The measured I–V characteristics could be interpreted as a possible confirmation of “near-constant-gain mode multiplication” predicted by simulations with the measured gain of about 100, but the authors finally noted “However, there remains the possibility that the measured I–V curves do not actually represent the expected gain characteristic.”
This design concept was also applied to 4H–SiC NAPD by some limited simulations using the ATLAS software package from SILVACO (Santa Clara, CA, USA) 
. No more studies and experimental results have been published on the NAPD to evaluate this original concept in detail.
2.7. Germanium APD for Silicon Photonics
Similar emphasis on minimization of an avalanche multiplication region down to sub-micrometer size was revealed in developments of the optical communication receivers in the 2000s. The receiver appeared to be a bottleneck element of an optical data transmission chain in a framework of silicon photonics pursued by IBM, Intel, and some other companies. Contradictory demands of the telecom applications for fastest response and lowest bit error rate eventually necessitate development of the ultra-low-capacitance ultra-short-drift-distance receiver with the fastest internal amplification, namely, the single-carrier multiplication APD. To be compatible with the silicon platform for system-on-chip integration, it was beneficial to make the APD based on a monolithic CMOS-compatible process of Ge/Si technology.
The Intel Silicon Photonics team led by Mario Paniccia developed a conventional separate absorption, charge, and multiplication (SACM) APD structure of a planar design in which light absorption and carrier multiplication occur in a vertical direction inside germanium and silicon, respectively, and achieved a gain-bandwidth product of 340 GHz (maximum measured bandwidth of 11.5 GHz for gains up to 20) for the 30 μ
m diameter device 
. The authors assumed that this APD design is feasible for data rates of 40 Gbps.
In contrast, the IBM Watson Research Center team led by Yurii Vlasov developed an original CMOS-compatible lateral receiver design—waveguide-integrated Ge APD as they focused on optical interconnects ranging from data centers and mainframes to board-to-board and on-chip levels (
). The authors pursued a set of contradictory demands: “ideally the APD should have a compact micrometer-scale footprint, operate at a voltage close to 1 V that is compatible with complementary metal oxide semiconductor (CMOS) technology, possess high avalanche gain, and detect very fast optical signals of up to 40 gigabits per second. These requirements are in strong contradiction to each other and are almost impossible to meet without significant innovations.”
Although Ge APDs suffer from high multiplication noise in germanium making conventional Ge APD noncompetitive for building digital optical links, they invented a new non-planar APD design 
“to produce a non-uniform electric field in which the high electric field with strength close to avalanche breakdown accelerates electron-hole pairs over impact ionization threshold thus producing avalanche amplification, which is employed as an effective photodetection mechanism or as a current amplification mechanism. The nonuniform field localized with sub-100 nm around the metal contact has field values higher than the impact ionization threshold of the semiconductor material.”
High non-uniformity, high strength, and high confinement of the electric field reduces randomness of the impact ionization process and results in a much lower ENF of the avalanche multiplication than predicted by McIntyre theory for uniform p–n junctions 
(the corresponding effective ratio of ionization coefficients for electrons and holes 𝑘𝑒𝑓𝑓
is found to be in a range from 0.1 to 0.2 instead of a bulk Ge value of 0.9).
2.8. HgCdTe Electron APD
A remarkable example of a record-low ENF in a linear mode APD should also be considered. In 1999, the DRS Technologies team dealing with focal plane arrays with the tunable bandgap semiconductor HgCdTe proposed an APD based on their High density vertically integrated photodiode (HDVIP) 
. The APD utilized the cylindrical p–n junction architecture. The cylindrical p–n junction favors electron injection from the absorption p-type region into the central high-field n-type region and emphasizes an electron-driven (single-carrier) avalanche multiplication process with low ENF. Hence, this device was called an ‘electron avalanche photodiode’ (EAPD) 
. Another benefit of the cylindrical junction geometry is a small capacitance which allows us to achieve the bandwidth of 2 GHz (limited by an electron transit time).
However, the main advantage of the EAPD is almost noise-free avalanche multiplication—ENF was observed as low as about 1.3 and independent of gain even at values of about 1000—to be an unprecedented result for linear mode APDs.
This ENF behavior was qualitatively and quantitatively explained by history-dependent ionization theory taking into account a unique conduction and valence band structure of HgCdTe with ballistic electron transport due to low phonon scattering 
. As discussed in 
: “Ballistic ionization results in a non-random, history dependent, deterministic ionization process, as opposed to the random, history independent process originally treated by McIntyre. The deterministic process thus removes the factor of two in excess noise in the case k = 0 and thus creates the condition of near “noiseless” gain.”
Finally, the cylindrical configuration of the p–n junction has not been found to be an influential factor regarding the unique behavior of the HgCdTe EAPD. Therefore, HgCdTe EAPDs of conventional planar designs have also been successfully developed. Nowadays, planar EAPDs exhibit a lower dark current and technological reliability to be competitive with the cylindrical HDVIP design, having better performance in the SWIR spectral range 
2.9. 3D Silicon Detector
Solid-state radiation detectors of high-energy particles often have a large thickness of a sensitive region to collect more electron-hole pairs per detected particle. In a planar design of the radiation detector, its electrodes (cathode and anode) are located at the front and back sides of the high-resistivity semiconductor wafer, and the signal charge carriers drift through the whole wafer to corresponding electrodes.
The 3D silicon detector was developed in 1997 with the main objective of turning the drift direction from a long vertical path (backside–frontside) to a short lateral path in a three-dimensional array of electrodes that penetrate into the bulk of the detector while maintaining the same large thickness of the sensitive region in the vertical direction 
Non-planar 3D design allows us to reduce the depletion voltages by about two orders of magnitude and the collection distances and times by about one order of magnitude, and greatly increase radiation hardness of the 3D detectors with respect to the planar detectors. Three-dimensional silicon detectors were widely recognized by high-energy physicists and were produced by many technological centers as a valuable instrumentation in many radiation detection experiments (e.g., the double-sided 3D detector for HL-LHC CERN experiments 
and reviewed in detail in 
An avalanche multiplication in an enhanced electric field near the n+ columns of the 3D silicon detectors has first been assumed 
and later investigated 
as a negative side-effect of the 3D design. The avalanche process presumably elongates transit times and complicates charge response calibration. Moreover, as noted in the review 
, “surface breakdown effects prevent from being operated at very large voltages, so that charge multiplication effects can not be fully exploited 
Despite the aforementioned concerns, possible improvement in signal-to-noise ratio (SNR) of the 3D detector response due to charge multiplication appeared to be a rather attractive goal for a dedicated feasibility study. Charge multiplication was especially demanded, as the wafers become thinner to minimize particle scattering, and the thinner the wafer, the lower the absorption and collected charge.
The study on this topic was based on numerical simulations and was reported at the 8th “Trento” workshop on Advanced Silicon Radiation Detectors in 2012 
. The authors analyzed various designs to adapt the 3D detectors to operate with built-in charge multiplication along with the entire length of the n+ columns.
First, they faced an early breakdown on the front and back surfaces of the n+ column if the column penetrated the sensitive layer from top to bottom. To suppress the front-surface breakdown, they applied p-spray and field plate measures but did not reproduce the same on the back side expecting technological issues. Therefore, they solved this problem in two steps: (1) lifting the n+ column at about 15 μm to avoid surface breakdown and (2) rounding the sharp edges of the tip of the n+ column and increasing its radius to increase the breakdown voltage at the tip to be comparable to the breakdown along the column.
Regretfully, to the best of the author’s knowledge, no experimental results have been reported on this original design so far.
2.10. Tip APD
Since early developments of SiPMs based on planar p–n junctions, the planar design provided higher peak PDE ≈15% 
(2001) compared with the non-planar n+ dot design of MRS APDs ≈10% 
(2000). In a decade, the maximum PDE of planar SiPMs reached a level of 60% 
(2012) outperforming non-planar micro-well APDs (PDE ≈40%
for MAPD-3NK 
, 2018). Therefore, there are no non-planar SiPMs on the market now.
However, since the mid-2010s, improvements in planar SiPM performance have started to approach inherent limits of the planar design. SiPM as an array of APD cells based on planar p–n junctions with an inactive border area reveals several major bottlenecks.
The first issue is a trade-off between geometric efficiency (and, hence, PDE) and dynamic range: the larger the cell size, the higher ratio of active area to inactive area (PDE), and the lower total number of cells per SiPM area, i.e., the dynamic range of the SiPM. Moreover, larger cells with larger capacitance have a longer recovery time, affecting the dynamic range in CW and long light pulse detection modes 
The second issue is an inclusion of a probability of avalanche triggering into PDE as well as into probability of correlated noise events (crosstalk and afterpulsing): the higher the PDE, the higher the correlated noise up to unacceptable values and the so-called second breakdown effect. Regarding optical crosstalk, this problem is partially eliminated by metal-filled trenches at the cell borders, but this measure emphasizes the first trade-off 
The third issue in the development of planar NIR SiPM with an extended spectral range to NIR wavelengths is the so-called border effect: the deeper the sensitive epilayer for more efficient the NIR absorption, the larger the insensitive volume at the edges of the p–n junction with losses of NIR efficiency 
Therefore, the demand for further advancements in the development of high-dynamic-range SiPMs with high PDE in a wide spectral range could hardly be met with known SiPM designs.
To overcome the limitations of planar SiPMs and the drawbacks of non-planar SiPMs mentioned above, a spherical junction-based SiPM—tip avalanche photodiode (TAPD), has recently been developed 
. The TAPD design approach transforms the edge breakdown problem into a benefit of highly efficient collection and multiplication of photoelectrons in the focusing electric field, features low breakdown voltage and low capacitance, and eliminates the need for borders between the cells.
TAPD significantly outperforms modern planar SiPMs. TAPD single electron response (SER) of 4.3 ns fall time is the fastest of the same 15-μm pitch SiPMs due to the lower capacitance of the TAPD. The peak PDE value of 73% is the highest value among the most efficient large-pitch SiPMs due to higher geometric efficiency.
Moreover, NIR PDE of 22% at 905 nm is also higher than that of modern NIR SiPMs for LIDAR applications developed by Broadcom (PDE = 18% 
), On Semiconductor (PDE = 18.5% 
) and Hamamatsu (PDE = 9% for MPPC S15639–1325PS) due to a 12-μ
m-thick epilayer without borders between cells.
Recently, the record-high PDE of the TAPD has been confirmed and its relatively good stability in a wide temperature range from −30 °C to 70 °C was reported in 
Another recent study of TAPD clarified its radiation-induced degradation characteristics 
. As observed, under irradiation with neutrons up to a fluence of 1012
, the DCR (including correlated noise) of the TAPD increases from 1 MHz to 2 GHz (estimated) while the DCR of a standard KETEK SiPM of the same 15 μ
m pitch and the same 1 mm2
area increases from 0.4 to 30 GHz (estimated), i.e., it becomes approximately 15 times higher in an absolute value.
The radiation hardness of TAPD is assumed to be associated with a strong dependence of the electric field on the junction curvature (almost insensitive to irradiation) and its relatively weaker dependence on the doping concentration of the p-type epilayer (affected by irradiation due to a so-called acceptor removal effect; see, e.g., 
), while the planar SiPMs are rather sensitive to doping concentration.
2.11. Current-Assisted APD and SPAD
Current-assisted APD (CA-APD) was proposed and developed by the Vrije University team in 2019 
. The main goal of the design was to resolve a trade-off of conventional planar APDs where the area of avalanche multiplication is as large as a photosensitive detector area; thus, the detector capacitance is high and the detector response is slow.
The authors noted that the CA-APD concept was inspired by the following: “Separate absorption and multiplication (SAM) regions can be introduced, as was presented in III–V semiconductors. Guiding minority carriers using a drift field has also been implemented to improve detection speed. Electron multiplication in HgCdTe APDs with ‘p-around-n’ geometry for midwave infrared detection has also been reported.”
The CA-APD concept was soon been extended to Geiger mode operations to develop Current-Assisted SPAD (CA-SPAD) in 2020 
. In fact, the current-assisted design also reminds the silicon drift detector, the avalanche drift diode, namely, a simplified version of the SDD due to an exclusion of deep implantations of n+ and p+ and external guard rings.
Despite the aforementioned simplifications, the CA-SPAD design provides an effective collection of photoelectrons from a large photosensitive volume to a small avalanche region due to the properly configured electrostatic potential (conduction band energy) profile 
. Most electrons are collected by drifting directly into the potential well at the n+ cathode, and the minority of electrons from the surface region exhibit slow diffusion passing near the potential wall at the p+ anode.
In the latest development, CA-SPAD has been improved by substituting an on-chip quenching resistor with an active quenching circuit 
. A peak photon detection probability (PDP) of 56% was achieved for a wavelength of 705 nm and PDP ≈ 20%
for a wavelength of 940 nm. However, a single photon time resolution (jitter) of 194 ns for 785 nm is not as good as typical jitter of modern planar SPADs with thin epilayer, and it has a long pronounced tail due to the diffusion.
2.12. Dot APD and Multi-Dot APD
Referencing current-assisted APD and TAPD, a simplified PIN and APD design based on a small dot-shaped n+ cathode with a quasi-spherical p–n junction and a focused electric field profile has been evaluated by a team from Technische Universität Wien led by H. Zimmermann. The authors specified an electric field-line crowding configuration as the main feature of the design.
First, the development of the PIN dot (spot) photodiode was mainly focused on its ultralow capacitance of approximately 1 fF combined with a relatively large sensitive area of 707 μ
. The PIN photodiode has the following dimensions: n+ dot radius of 1 μ
m, p+ anode inner radius of 15 μ
m, and epilayer thickness of 24 μ
m. However, the nine-fold reduced capacitance compared with the planar PIN photodiode does not result in an increased bandwidth (∼300 MHz) due to enlarged transit distances, while rise and fall times are acceptable short of about 1 ns. The photodiodes are expected to be useful as large-area low-noise optical receivers up to 500 MHz.
Second, the dot APD was manufactured using a standard CMOS process without any modifications. It has about the same dimensions as the PIN photodiode presented above: n+ region with a radius of 0.37 μ
m embedded in an n− well region with a radius of 0.6 μ
m, p+ anode inner radius of 19 μ
m, and thickness of the epilayer of 24 μ
m. The presented APD achieves a gain-bandwidth product of up to 384 GHz, corresponding to the gain of 80 and bandwidth of 1.28 GHz. As summarized in 
: “The field-crowding APD reduces the optical power and increases the avalanche gain as well as the bandwidth compared to the other APDs.”
Third, the multi-dot APD design as an extension of the same approach has been evaluated by TCAD simulations and manufactured in 0.35 μm CMOS technology as an array of 5 × 5 cathode dots with a pitch of 14 μm. The multi-dot APD is characterized by a gain of 36 and a 3-dB bandwidth of 1.8 GHz while its capacitance is four times lower than that of comparable planar APDs.
2.13. Charge-Focusing SPAD
Anticipating a demand for the development of SPAD arrays with a small pitch and high sensitivity to near-infrared (NIR) radiation, especially for LIDAR applications (see, e.g., 
), a team from Katholieke Universiteit Leuven and IMEC (Belgium), and OmniVision Technologies (USA) started R&D on CMOS compatible NIR-enhanced silicon BSI SPAD in 2019 
The charge-focusing SPAD design utilizes a small dot-shaped n + cathode with quasi-spherical p–n junction. The authors underlined that the device relies on geometry for the formation of a field peak near the cathode.
It is worth noting that one of the consequences of the geometry-driven electric field configuration appeared to be a low sensitivity of the APD to process fluctuations observed with the first experimental samples 
: “The variability of the breakdown voltage on a BSI wafer is measured to be less than 0.6%. This is more than an order of magnitude lower than the variability measured for a reference NIR-enhanced SPAD on the same wafer.” This feature allows the development of a reliable and reproducible SPAD array based on the charge-focusing approach.
The first charge-focusing backside-illuminated (BSI) SPAD array prototypes of 3 × 3 and 3 × 10 pixels with active quenching have been developed and measured in 2022 
The BSI SPAD has a peak PDE of 66% near 660 nm and a value of 27% at 905 nm. The results demonstrated that the charge-focusing BSI SPAD outperformed previously reported current-assisted FSI SPAD (PDE of 27% vs. < 11% at 905 nm, DCR of 640 Hz vs. 4 MHz accordingly (Table 1 in 
)). However, the quantum efficiency of the frontside-illuminated (FSI) photodetectors is lower than that of the BSI photodetectors for any comparable designs.
Comparing the charge-focusing SPAD array with the TAPD 
, the authors noted their similar advantages due to the field-line crowding effect and underlined a simple planar technology of the SPAD array preferable for integration with active CMOS electronics.
Let us also note the similarity of the charge-focusing SPAD array and the MRS APD.
2.14. Charge-Focusing SPAD Image Sensor
The development of image sensors is a mature and still emerging area of cutting-edge technology and strong competition. To succeed in it, many challenging and often contradictory demands have to be achieved: high PDE in a wide spectral range, low dark and readout noise, high dynamic range starting from single photons, high spatial resolution (micrometer and even submicrometer scale of pixels), high temporal resolution (timing jitter) and large number of pixels in the sensor array 
. Fast progress and remarkable advancements in all these objectives have been demonstrated by a team from AQUA lab, EPFL, and Canon Inc.
First, considering a problem of the miniaturized SPAD array with high fill factor (geometric efficiency), K. Morimoto and E. Charbon proposed a novel guard-ring-sharing technique to resolve the trade-off between fill factor and pixel pitch 
: “Compared to the conventional well-shared structure, the isolation well between neighboring pixels is eliminated. The pixel is virtually isolated by the shared guard ring region with shallow trench isolation (STI). Assuming the shared guard-ring width of 1 μ
m, the theoretical limit of the pitch of the pixels can be reduced to 2 μ
m for 20% fill factor.”
Second, current-assisted and charge-focusing designs have been identified as another option for miniaturization without loss of a sensitive area. Combining the advantages of guard-ring sharing and charge-focusing approaches, a charge-focusing SPAD image sensor for low-light imaging applications was proposed and developed in 2020 
The following year Canon announced the successful development of a 13.2 mm × 9.9 mm BSI SPAD sensor with the world’s highest resolution of 3.2-megapixel images and high color reproduction even in dark environments 
. Sensor parameters are the best ever reported for BSI SPAD arrays: highest PDE (peak PDE = 69.4% at 510 nm, NIR PDE = 32.8% at 850 nm and 24.4% at 940 nm), lowest DCR of 44 Kcps/mm22
(comparable with the best planar SiPMs), lowest pixel pitch of 6.39 μ
m, and lowest timing jitter of 100 ps FWHM.
Recently, this team demonstrated improvements of the SPAD image sensor in dynamic range (143 dB) and power consumption of 0.37 W while relaxing in the pixel numbers (960 × 960 array) and pitch (9.585 μ
. As reported, the fill factor of ∼100%, the PDE of ∼70%, and the low DCR represent the best-in-class performance thanks to the charge-focusing approach. Additionally to charge-focusing BSI configuration, the SPAD pixels are equipped with light-focusing microlenses to generate a majority of photoelectrons near a central axis of the pixel and minimize the transit distance dispersion, i.e., timing jitter.
2.15. Nanophotonic SiPM—Quantum Silicon Detector
Initially, a unique photon number resolution of the SiPMs and a very good energy resolution of high energy particles in scintillation detectors with the SiPM readout have been recognized. Since the early 2010s, attention to SiPM applications has been extended beyond energy-resolved to time-resolved or combined ones. Amongst many time-of-flight (TOF) applications, the TOF PET appeared to be the most attractive for many reasons, and TOF-PET/MRI and TOF-PET/CT systems based on SiPMs have been developed by General Electric, Philips, Siemens, and United Imaging.
In these scanners, the TOF modality provides considerable improvements in the image quality by rejecting background events and increasing the signal-to-noise ratio of the image (100 ps TOF resolution results in a 5-fold improvement in SNR or, equally, in a 25-fold dose reduction). However, an ultimate goal in TOP PET is to achieve direct 3D reconstruction of the PET images eliminating the back-projection problem. This goal requires a TOF resolution of 10 ps (equal to a spatial resolution of 1.5 mm along the line of response) 
To pave the way toward 10 ps TOF-PET as well as other challenging TOF applications like LIDAR and 4D imaging calorimeter for high-energy particle detectors of modern colliders, a team from CERN CMS/Crystal Clear collaboration led by P. Lecoq started various activities on radical improvements of timing performance of SiPMs and scintillation detectors in the mid-2010s, namely, the Brainstorming Workshop on factors influencing the timing resolution of SiPMs, 2015 
, FAST—Fast Advanced Scintillator Timing EC COST action, 2015–2018 
, the 10 ps TOF-PET challenge contest 
, and the PHOTOQUANT project of ATTRACT-EU program 
Nanophotonic SiPM - Quantum Silicon Detector: concept of the SiPM pixel design.
Reproduced from 
under open access license (CC BY 4.0).
In a framework of the PHOTOQUANT project, they tried to combine all possible measures to obtain the best TOF resolution from nanophotonic, metamaterial, charge-focusing SPAD and SiPM technologies 
. The detector concept implements the following ideas:
Optical focusing of the photons to very small SPADs to fight against the fill factor losses;
Electron focusing on an even smaller amplification region, to further reduce the capacitance and to reduce the effects of field non-homogeneities;
Enhancement of the photonic density of states in a well defined depth of the structure (actually in a thin hyperbolic metamaterial layer), to increase the probability of photon-electron coupling (and therefore the PDE through the QE) and to reduce the time jitter by forcing the start of the avalanches at a well defined depth, particularly important for LIDAR applications.
Now, Fondazione Bruno Kessler is investigating the feasibility of this concept for manufacturing using 2.5D and 3D integration technologies, as recently reported 
. However, they identified several technological challenges to be solved.
Remarkable progress in semiconductor technologies, especially CMOS, allows non-planar devices to be almost as perfect as the planar ones and, on the other side, squeezes dimensions of the planar devices to almost non-planar configurations.
Therefore, we can expect emerging developments of the non-planar designs in many directions as well as very promising synergy between planar and non-planar approaches in the near future.