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References

1. Zhang, Yifan; Liu, Yunxin; Zhuang, Li; Liu, Xuanzhe; Zhao, Feng; Li, Qun. Accurate CPU Power Modeling for Multicore Smartphones (Report). Microsoft Research. MSR-TR-2015-9. https://www.microsoft.com/en-us/research/publication/accurate-cpu-power-modeling-for-multicore-smartphones/. 
2. Mittal, Sparsh; Vetter, Jeffrey S. (2014). "A Survey of Methods for Analyzing and Improving GPU Energy Efficiency". ACM Computing Surveys 47 (2): 1–23. doi:10.1145/2636342. https://www.academia.edu/6644474. 
3. Cutress, Ian (2012-04-23). "Undervolting and Overclocking on Ivy Bridge". http://www.anandtech.com/show/5763/undervolting-and-overclocking-on-ivy-bridge. 
4. Chin, Mike (2004-06-15). "Athlon 64 for Quiet Power". p. 3. http://www.silentpcreview.com/article169-page3.html. "Thermal Design Power (TDP) should be used for processor thermal solution design targets. The TDP is not the maximum power that the processor can dissipate." 
5. Cunningham, Andrew (2013-01-14). "The technical details behind Intel's 7 Watt Ivy Bridge CPUs". Ars Technica. https://arstechnica.com/gadgets/2013/01/the-technical-details-behind-intels-7-watt-ivy-bridge-cpus/. "In Intel's case, a specified chip's TDP has less to do with the amount of power a chip needs to use (or can use) and more to do with the amount of power the computer's fan and heatsink need to be able to dissipate while the chip is under sustained load. Actual power usage can be higher or (much) lower than TDP, but the figure is intended to give guidance to engineers designing cooling solutions for their products." 
6. "Enhanced Intel SpeedStep Technology for the Intel Pentium M Processor (White Paper)". Intel Corporation. March 2004. ftp://download.intel.com/design/network/papers/30117401.pdf. 
7. Jan M. Rabaey; Massoud Pedram; editors. "Low Power Design Methodologies". 2012. p. 133. https://www.google.com/books/edition/Low_Power_Design_Methodologies/9IzuBwAAQBAJ
8. De Vogeleer, Karel; Memmi, Gerard; Jouvelot, Pierre; Coelho, Fabien (2013-09-09). "The Energy/Frequency Convexity Rule: Modeling and Experimental Validation on Mobile Devices". arXiv:1401.4655 [cs.OH]. //arxiv.org/archive/cs.OH
9. Su, Ching-Long; Tsui, Chi-Ying; Despain, Alvin M. (1994). Low Power Architecture Design and Compilation Techniques for High-Performance Processors (Report). Advanced Computer Architecture Laboratory. ACAL-TR-94-01. http://www.scarpaz.com/2100-papers/Power%20Estimation/su94-low%20power%20architecture%20and%20compilation.pdf. 
10. Basu, K.; Choudhary, A.; Pisharath, J.; Kandemir, M. (2002). Power Protocol: Reducing Power Dissipation on Off-Chip Data Buses. 345–355. doi:10.1109/MICRO.2002.1176262. ISBN 978-0-7695-1859-6. http://cucis.eecs.northwestern.edu/publications/pdf/BasCho02A.pdf. 
11. Al-Khatib, Zaid; Abdi, Samar (2015-04-13). Operand-Value-Based Modeling of Dynamic Energy Consumption of Soft Processors in FPGA. Lecture Notes in Computer Science. 9040. Springer, Cham. 65–76. doi:10.1007/978-3-319-16214-0_6. ISBN 978-3-319-16213-3.  https://dx.doi.org/10.1007%2F978-3-319-16214-0_6
12. Sutter, Herb (2005). "The Free Lunch Is Over: A Fundamental Turn Toward Concurrency in Software". Dr. Dobb's Journal 30 (3). http://www.gotw.ca/publications/concurrency-ddj.htm. 
13. Johnson, R. Colin (2011-08-18). "IBM demos cognitive computer chips". EE Times. http://www.eetimes.com/electronics-news/4218883/IBM-demos-cognitive-computer-chips. 
14. "Frequently Asked Questions About Temperature for Intel® Processors". https://www.intel.com/content/www/us/en/support/articles/000005597/processors.html.