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Crystal defects play roles in wide bandgap semiconductors and dielectrics under extreme environments (high temperature, high electric and magnetic fields, intense radiation, and mechanical stresses) found in power electronics. Defects requires real-time in situ material characterization during material synthesis and when the material is subjected to extreme environmental stress. It is shown that the reduction of defects represents a fundamental breakthrough that will enable wide bandgap (WBG) semiconductors to reach full potential. High-brightness X-rays from synchrotron sources and advanced electron microscopy techniques are used for atomic-level material probing to understand and optimize the genesis and movement of crystal defects during material synthesis and extreme environmental stress.
- wide bandgap
- reliability
- high voltage
- defects
1. Introduction
One of the most significant challenges for materials technology in the 21st century pertains to the excited state characteristics of crystal defects present in semiconductor and dielectric materials used for energy conversion devices [1][2][3][4][1,2,3,4]. These high-voltage and high-power switching devices experience extreme electrical and thermal stresses because of inherent high electric fields and high currents generated during their operation. In addition, they are subjected to extreme environments, including high ambient temperatures, thermal cycles, high magnetic fields, radiation, vibration, and corrosion.
Silicon has served well as the industry “workhorse” semiconductor for power electronics switching applications; however, wide bandgap (WBG) semiconductors, especially diamond and GaN, with significantly superior electrical and thermal characteristics compared to silicon, are the key enablers for transforming the electricity infrastructure for the 21st century [3][4][5][6][3,4,5,6]. Current filament formation and micro plasma generation are the main causes of power semiconductor device failures in circuit applications. Device failures occur either during the on-state when conducting high amounts of currents or when switching high voltages and currents. There are significant experimental test results suggesting that material defects in WBG semiconductors and diamond severely limit the manufacturing yield, device performance, and long-term field reliability, thereby hindering many of the key beneficial attributes of WBG and ultra-wide bandgap power semiconductor technology for advanced energy initiatives. These performance and reliability limitations in WBG power switching technology severely impact future advances in many of the commercial applications, including vehicle electrification, utility grid transformation, and renewable energy utilization.
This review concentrates on the elements which limit the present-day wide insertion of these technologies in power electronic applications. The present study shows that what is lacking is the fundamental understanding of the role that crystal defects play when WBG semiconductor devices are operating under extreme temperature and voltage environments. For example, it is not clear if certain types of defects are benign, and if they are, then for how long. This basic understanding of the genesis and excited state behavior of crystal defects is critical to (1) study and quantify the role of specific type of defects on the performance and reliability of WBG high-voltage devices, and (2) devise appropriate material synthesis and device fabrication techniques that yield reduced defect density and mitigate the deleterious effects of defects.
The present investigation has focused on material behavior in the extreme environment. The basic experimental and theoretical research on the physical phenomena relevant to defects in the WBG semiconductor and diamond materials used in high-voltage power-switching devices as well as the high temperature environment are presented. The application of advanced material probing techniques is presented for the real-time study of defect dynamics when WBG semiconductors and diamond are subjected to extreme environmental stress.
The defects degrade the expected material theoretical properties. At present, electrical devices, components and subsystems categorically rely on materials that appear or behave in ways that are very different from ideal. Evidence suggests that defects in real technologies have been heretofore unavoidable because of conditions in growth and the processing of materials long before their integration into actual devices.
Although defects are manifested in the electrical performance of a device, two potential routes were pursued for reducing their effect, corresponding to two overarching scientific questions. (1) Can we understand the origins, evolved forms, and dependency on extreme conditions of individual and agglomerations of defects in a manner that promotes their manipulation and annihilation? (2) How does this information ultimately influence the electrical properties and performance of the materials and devices in extreme environments? The response to the first question is to identify and eliminate the root cause, namely, the lattice defect itself as it originates at interfaces, surfaces, and bulk regions [7][8][9][7,8,9]. This is a problem of manipulating the material structure as the material is being synthesized. Through careful design of growth conditions, it may be possible to develop lattice features that inhibit the nucleation or propagation of defects. The second potential route is to ameliorate the effects on the electrical performance of the lattice defect by exploiting the fundamental behavior of electrons in the presence of defects. Significant additions to the state of knowledge are still needed to effectively pursue either of these routes. In fact, the effects caused by the extreme conditions to be experienced by the lattice and electrons and scientifically sound approaches to deal with the associated challenges are still elusive. High temperatures, large electrical or magnetic fields, radiation sources and mechanical stresses bring about complications that break conventional rules based on idealized conditions.
Computational simulations have a unique but complementary role in these pursuits. They can be used to limit the number of active theoretical parameters and control their influence on a mechanism, thereby eliminating the effects of variables that may be difficult to isolate in some experiments. Computations can also allow us to limit the complex material synthesis experiments necessary to achieve low dislocation densities. This can be used to identify parameter dependencies that are most influential over the response variables of interest. In this regard, computational methods and simulations can work as tools for true scientific discovery by delivering numerical solutions to theoretical equations whose parameters and conditions are so complex that they would not be solved otherwise. Computing-based test beds can also be used to develop important new ideas to screen and design novel experiments. This can ultimately promote focus on feasible concepts, thereby enabling an accelerated pipeline to commercialization and adoption. Computations are enabled, in large part, by new algorithms that make it possible to investigate defects at varying scales of description that were intractable just five years ago. Moreover, the ever-increasing capabilities of processor technologies also open the possibility for new research directions to develop new modeling theories and techniques to investigate mechanisms that remain inaccessible through existing computing approaches.
The current state of bulk diamond and GaN crystal growth technology lags behind even the state of silicon wafer technology of the 1960s in terms of defect density and cost. Today, diamond and GaN wafers are much smaller than silicon, more than 100 times higher in cost and contain 1000 times more defects than silicon wafers. This situation is not likely to change in the foreseeable future. In summary, while there is evidence that dislocation densities in diamond and GaN bulk substrates have diminished over the past two decades, significant densities of defects persist that will require a very large investment of resources over a sustained period of time before they can be significantly reduced [10][11][12][13][10,11,12,13]. Research in bulk substrates is beyond the scope of the power electronics industry. Therefore, most of the focus is on using surface modification methodologies to influence defect propagation from the substrate into the epilayer, and to investigate the electrical activity of defects in the epilayer as well as the influence of defects on the epi/dielectric interface.
In the past two decades, much of the federal investment in power electronics in the U.S. has been directed toward applied research focused on demonstrating power converter applications based on wide bandgap (WBG) power devices [14][15][16][17][18][14,15,16,17,18]. At the present, commercially available power devices have limited voltage and current ratings, are prohibitively expensive, and are yet to be proven reliable in extreme environment applications [3]. Furthermore, the manufacturing yield is “low”, which is largely due to a high density of material defects in both SiC and GaN semiconductors [19][20][19,20].
2. Results from the High Voltage/Temperature Extreme Environmental Evaluation
Wide bandgap semiconductor materials experience both intrinsic and extrinsic extreme environmental stresses that are at the limit of material breakdown. For example, the semiconductor and dielectric materials used in the construction of power electronic switching devices experience extreme electrical and thermal stresses during the on-state as well as when switching high voltages and high currents. In a bipolar power semiconductor switching device (Figure 1a), the high-level injection of minority carriers is required to achieve significant conductivity modulation and reduce the on-state resistance. If the semiconductor contains a high density of crystal defects, as is the case with wide bandgap (WBG) semiconductors, minority carrier recombination is adversely affected [21][22][21,22]. The basal plane dislocations (BPDs) present in SiC are excited by the energy released from the minority carrier recombination process, which leads to additional BPD generation along with its associated movement within the semiconductor material, causing an increase in the on-state resistance and eventual thermal run-away in a forward biased bipolar junction diode. This finding prompted the “world-wide” research community to investigate new material synthesis techniques that convert BPDs into threading edge dislocations (TEDs) [23][24][23,24]. The exact role of TEDs on device performance and reliability, especially under extreme environments, is still not well understood. In a similar development, the space-charge injected during voltage switching in a majority carrier device, such as the Schottky barrier diode (Figure 1b), results in local regions of elevated thermal dissipation or “hot spots” that cause loss of electrical functionality in SiC, even at moderately low dv/dt values (see Figure 2a) [25]. To date, there is no convincing explanation of this physical mechanism, although there is experimental indication showing a correlation between “hot spots” and defects. A fundamental requirement of semiconductor materials in such high-power applications is the ability to withstand localized Joule heating. It was shown that the worst-case Joule heating occurs when the semiconductor power switch is experiencing a simultaneous high-current and high-voltage condition, often referred to as an “avalanche state” [26][27][26,27]. This situation typically occurs when the switch is short-circuited and/or absorbing the energy stored in a charged inductor. The measured avalanche energies of 600 V silicon and SiC power diodes are shown in Figure 2b [25].
Figure 1. Potential mechanisms for defect excitation in a (a) forward-biased bipolar semiconductor diode junction, and (b) a unipolar Schottky barrier diode junction [25].
Figure 2. Measured (a) dv/dt capability and (b) avalanche energy of 600 V silicon and SiC power diodes [24].
2.1. Effects of High-Temperature Stress on Metal–Semiconductor Interface
Controlling defects and understanding their effects on electrical properties of semiconductors and dielectrics under extreme environments also includes the metal–semiconductor contacts that provide mechanical support and electrical interconnection for the device, and also remove heat from active semiconductor regions. However, these packaging materials, when improperly chosen or processed, can induce strain into the semiconductors, resulting in defect generation and changes in the electronic transport in the semiconductor. Note that SiC and GaN are particularly susceptible to package-related thermal stresses, which may interact with the semiconductor material residual stresses and even piezoelectric stresses augmented at elevated temperatures.
Metal contacts to the doped semiconductor regions, either ohmic or Schottky, generally remain stable within the envelope of the extreme environment. Establishing a low electrical resistance and a low thermal boundary resistance requires tailoring the metal contacts to minimize electron and phonon scattering, respectively. Furthermore, complex thermally stable thin film contact metallurgy is generally applied to obtain interfaces with high performance electrical, thermal and mechanical characteristics [28]. Ohmic and Schottky contacts for SiC and GaN were extensively studied; however, the long-term durability of multilayer metal contact structures at elevated temperatures up to 500 °C needs to be understood [29][30][31][32][33][29,30,31,32,33]. Physical mechanisms, such as diffusion and inter metallic/void formation at elevated temperatures may lead to significant changes in basic mechanical and electrical properties of the contact. Johnson et al. [34][35][36][37][34,35,36,37] studied the mechanical die shear strength of multilayer thin and thick film metal interfaces for high-temperature environments. Basic material degradation effects, including nano-void formation and evolution, and electromigration were observed.
2.2. Physics of Failure Analysis for Extreme Environment Predictions
The extreme environment, whether temperature, radiation or mechanical stress is the accelerating parameter, provides the perfect condition for degradation (as related to defects). In this effort, the physics-of-failure (PoF) methodology is applied in the present work as the method for degradation data analysis from the extreme environment accelerated tests. The fusion prognostics method of testing, which combines PoF modeling with data-driven prognostics, allows extreme environment tests to be terminated before failure, significantly reducing the test time, and to be able to capture the intended physical phenomenon prior to complete degradation. The loading conditions include the complex multiple environments of temperature, temperature cycling, high fields and radiation stresses (see Figure 3).
Figure 3. Time-to-failure in the field can be predicted from testing. Accelerated testing shortens the time-to-failure by increasing stress levels. Prognostic accelerated testing additionally shortens the test time by reducing the damage level at which the prediction of failure (PoF) is made from the failure threshold to the anomaly detection threshold. PoF models are used to relate the anomaly detection threshold to the failure threshold and to relate the time-to-failure in the test to the time-to-failure in the field.
2.3. Evaluation under Extreme Radiation Environment
The basic understanding of defect generation and interaction with the radiation environment is based on single event charge deposition and trapping, and the total dose radiation and ionizing radiation dynamics on test structures, such as MOS capacitors and diodes (Schottky and PiN diodes). The results were incorporated into radiation materials physics models in conjunction with Monte Carlo simulations for channel transport, transport in the presence of single-event deposition processes as well as total dose deposition. The investigations were able to attain a clear basic science understanding of the interactions of the radiation environment with defects and electrical transport in GaN and SiC semiconductors.
The most important single event effects (SEE) are the classical single-event upset (SEU) and the lesser known but increasingly important digital single-event transients (DSET). Unlike SEU, DSET events give rise to charge transients, which propagate to interfaces and further upset the charge distribution at the interfaces. Several criteria must be met for a DSET to result in material degradation: (a) a path must exist from the struck node to a metallic drain, or a transient of charge must be of sufficient magnitude and width; and (b) the transient must arrive with an appropriate delay time. The present research investigates neutron interactions with GaN and SiC bulk materials and their surfaces and interfaces. We initially showed that neutrons introduce defects at interfaces, which decrease the net polarization charge as well as the free electron concentration in channels. The identified shallow trap exhibits donor-like behavior. At fluencies above 1014 n/cm2, an impurity band is formed, and the conduction mechanism becomes thermal. Carrier removal due to neutron interactions is also a significant observation in the present work. The issue of ionizing radiation is due to the extreme space environment from cosmic radiation, which results in positive charged particles and Van Allen belts, which produce energetic electrons and protons. Solar radiation produces gamma radiation and protons. The cumulative long-term ionizing damage due to proton, γ- and β-radiation results in a total ionizing dose which raises the semiconductor to an excited state, resulting in yet unexplored phenomenon, such as phonon accumulation.
2.4. Accelerated Stress Testing to Quantify Cosmic-Ray Induced Failures
The critical environment effects of cosmic radiation were made evident by the reported failure of silicon power devices in space and high-altitude applications [38]. Although fewer and lower energy cosmic rays reach the Earth’s surface, this phenomenon is an increasing concern for terrestrial applications of power semiconductor devices. Studies have shown that cosmic-ray-induced effects can strongly influence the voltage de-rating necessary for the safe and long-term use of silicon power devices, directly affecting their adoption and use in various applications. The high energy particles in cosmic rays are known to damage high-voltage silicon power devices, resulting in single-event upsets (SEUs), such as single-event burnout (SEB) and single-event gate rupture (SEGR). The SEB is caused by the initiation of destructive avalanching, due to drain-source current filaments resulting from the activation of parasitic bipolar elements present in all power devices, except diodes. The SEB in diodes is simply due to excessive leakage current induced by high-energy particles while the device is biased at a high voltage. In MOS-controlled power devices, SEGR can occur due to the generation of a high transient electric field across the gate oxide and subsequent discharge of accumulated holes through the gate oxide. Consequently, silicon power devices are limited to approximately 50% of their rated voltage in characteristic usage [29]. The challenge is then to carefully investigate the interaction of material defects in SiC and GaN structures with the cosmic rays [39].
2.5. Defect Spectroscopy
The techniques reported include deep level transient spectroscopy (DLTS), photoconductivity spectroscopy, photo-induced current transient spectroscopy (PICTS) and photoluminescence spectroscopy. Optical defect spectroscopic techniques are especially useful for WBG semiconductors since they can access a wide range of defects with energies deep within the bandgap, not accessible by thermal ionization. Furthermore, these techniques can detect defects as low as the part per billion level; in addition to determining the defect energy level, the concentration and capture cross-section were determined. Defect formation by irradiation was previously studied in detail for GaN materials and devices [40]. Irradiation results in carrier traps that reduce mobility and conductivity. A number of traps due to native defects and complexes were previously identified by DLTS. For SiC devices, the irradiation of Schottky barrier diodes (SBDs) with γ-rays and electrons were undertaken [41][42][41,42].
3. Summary
The role of crystal defects in wide bandgap semiconductors and dielectrics under extreme environments (high-temperature, high electric and magnetic fields, intense radiation and mechanical stresses) found in power electronics is summarized in Table 1. Understanding defects in such semiconductors is necessary in order to realize the enormous potential for advanced energy applications. Material synthesis and characterization techniques with atomic-level control are necessary in order to achieve dramatic reductions in bulk and interface defects needed for materials operating within these extreme environments. This will require real-time in situ material characterization during material synthesis and when the material is subjected to extreme environmental stress. It is shown the reduction of defects represents a fundamental breakthrough that will enable semiconductors and, namely, wide bandgap (WBG) semiconductors, to reach full potential. The main emphasis of the present review was to understand defect dynamics in WBG semiconductor bulk and at interfaces during the material synthesis and when subjected to extreme environments. High-brightness X-rays from synchrotron sources and advanced electron microscopy techniques were used for atomic-level material probing to understand and optimize the genesis and movement of crystal defects during material synthesis and extreme environmental stress. Strongly linked multi-scale modeling also provides a deeper understanding of defect formation and defect dynamics in extreme environments.Table 1.
Summary of WBG device characteristics and the challenges posed by defects.
| Characteristic | Challenges | ||
|---|---|---|---|
| Effects of high-temperature stress on metal–semiconductor interface |
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| Cosmic ray-induced failures |
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| On-state static electrical stress |
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| Off-state static electrical stress |
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| High-voltage and high-current switching stress |
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| Electron transport under high magnetic field stress |
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| Impact of epitaxial defects on electron transport |
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| Defect evolution under stresses and large temperatures |
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