1. Hardware

The LVDC was capable of executing 12190 instructions per second. For comparison, a 2012-era microprocessor can execute 4 instructions per cycle at 3 GHz, achieving 12 billion instructions per second, one million times faster.

Its master clock ran at 2.048 MHz, but operations were performed bit-serially, with 4 cycles required to process each bit, 14 bits per phase, and 3 phases per instruction, for a basic time of 168 cycles = 82 μs for a simple add. (A few instructions, such as multiply or divide, took a few times this value.)

Memory was in the form of 13-bit syllables, each with a 14th parity bit.^[1] Instructions were one syllable in size, while data words were two syllables (26 bits). Main memory was random access magnetic core, in the form of 4,096-word memory modules. Up to 8 modules provided a maximum of 32,768 words of memory. Ultrasonic delay lines provided temporary storage.

For reliability, the LVDC used triple-redundant logic and a voting system. The computer included three identical logic systems. Each logic system was split into a seven-stage pipeline. At each stage in the pipeline, a voting system would take a majority vote on the results, with the most popular result being passed on to the next stage in all pipelines. This meant that, for each of the seven stages, one module in any one of the three pipelines could fail, and the LVDC would still produce the correct results. The result was an estimated reliability of 99.6% over 250 hours of operation, which was far more than the few hours required for an Apollo mission.

With four memory modules, giving a total capacity of 16,384 words, the computer weighed 72.5 lb (32.9 kg), was 29.5×12.5×10.5 inches in size (74×32×27 cm) and consumed 137 watts.

2. Software Architecture and Algorithms

LVDC instruction words were split into a 4-bit opcode field (least-significant bits) and a 9-bit operand address field (most-significant bits). This left it with sixteen possible opcode values when there were eighteen different instructions: consequently, three of the instructions used the same opcode value, and used two bits of the address value to determine which instruction was executed.

Memory was broken into 256-word "sectors". 8 bits of the address specified a word within a sector, and the 9th bit selected between the software-selectable "current sector" or a global sector called "residual memory".

The eighteen possible LVDC instructions were:^[2]:20-101

2.1. Programs and Algorithms

In flight the LVDC ran a major computation loop every 2 seconds for vehicle guidance, and a minor loop 25 times a second for attitude control. The minor loop is triggered by a dedicated interrupt every 40ms and takes 18ms to run.^[3]

Unlike the Apollo Guidance Computer software, the software which ran on the LVDC seems to have vanished. While the hardware would be fairly simple to emulate, the only remaining copies of the software are probably in the core memory of the Instrument Unit LVDCs of the remaining Saturn V rockets on display at NASA sites.

3. Interrupts

The LVDC could also respond to a number of interrupts triggered by external events.

For a Saturn IB these interrupts were:

For a Saturn V these interrupts were:

4. Construction

The LVDC was approximately 30 inches wide, 12.5 inches high, and 10.5 inches deep and weighed 80 pounds.^[4] The chassis was made of magnesium-lithium alloy LA 141, chosen for its high stiffness, low weight, and good vibration damping characteristics.^[5]:511 The chassis was divided into a 3 x 5 matrix of cells separated by walls through which coolant was circulated to remove the 138 Watts^[6] of power dissipated by the computer. Slots in the cell walls held "pages" of electronics. The decision to cool the LVDC by circulating coolant through the walls of the computer was unique at the time and allowed the LVDC and LVDA (part-cooled using this technique) to be placed in one cold plate location due to the three dimensional packaging. The cold plates used to cool most equipment in the Instrument Unit were inefficient from a space view although versatile for the variety of equipment used. The alloy LA 141 had been used by IBM on the Gemini keyboard, read out units, and computer in small quantities and the larger frame of the LVDC was produced from the largest billets of LA 141 cast at the time and subsequently CNC machined into the frame.

A page consisted of two 2.5 x 3-inch boards back to back and a magnesium-lithium frame to conduct heat to the chassis. The 12-layer boards contained signal, power, and ground layers and connections between layers were made by plated-through holes.

Up to 35 alumina squares 0.3 x 0.3 x 0.070 inch ^[7] could be reflow soldered to a board. These alumina squares had conductors silk screened to the top side and resistors silk-screened to the bottom side. Semiconductor chips 0.025 x 0.025 inch, each containing either one transistor or two diodes, were reflow soldered to the top side. The complete module was called a unit logic device.^[8] The unit logic device (ULD) was a smaller version of IBM's Solid Logic Technology (SLT) module, but with clip connections.^[9] Copper balls were used for contacts between the chips and the conductive patterns.^[5]:509

The hierarchy of the electronic structure is shown in the following table.

5. Gallery