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Analysis of InAs Quantum Dot Laser Diodes with Au Layer

Subjects: Electrical & Electronic Engineering View times: 207
Submitted by: Hyun Jae Kim

Abstract

Thermal Analysis of InAs Quantum Dot Laser Diodes with an Additional Au Layer on p-Metal

 The thermal characteristics of laser diodes (LDs) are analyzed by using a finite element method. A change in the junction temperature depending on the thickness of the additional Au layer, which might be deposited or plated on the p-contact metal of the LD, has been observed. As the Au layer thickness increases, the junction temperature of the LDs, which are epi-up mounted on a Cu sub-mount, goes down drastically and then saturates. On the other hand, the junction temperature of LDs epi-down mounted on a Cu sub-mount shows relatively little variation with the Au thickness, although it is lowered by more than 30 °C at an electrical input power of 1.2 W compared to that of epi-up mounted LDs. We measure the junction temperatures of InAs quantum dot (QD) LDs and compare them with simulation results. The junction temperatures increased at a rate of 86 °C/W and 48 °C/W for epi-up and epi-down mounting with an additional Au layer of 0.2 μm, respectively.

https://doi.org/10.3938/jkps.59.3146

 Figure 1 shows the InAs QD LD structure for the thermal analysis. Epi-layers were grown on  n+-GaAs substrates by using a molecular beam epitaxy (MBE) system. The laser structure consisted of a 500 nm thick GaAs buffer layer, a 1.5 μm thick n-Al0.35Ga0.65As lower cladding layer, an InAs QD layer, a 1.5 μm thick p-Al0.35Ga0.65As upper cladding layer, and a 400 nm thick GaAs p+ contact layer which were sequentially grown from the substrate. A graded index waveguide layer was inserted between each (lower and upper) cladding layer and the QD active layer. The waveguide layer consisted of 36 pairs of short-period super lattices with a 2-nm thick Al0.3Ga0.7As and a 2-nm-thick GaAs layer. The ridge-type LDs with aperture widths of 5 μm were fabricated through typical processes like etching, deposition of SiO2, and metallization of p-metal (Ti/Pt/Au = 30 nm/30 nm/300 nm) and n-metal (AuGe/Ni/Au = 30 nm/30 nm/300 nm) for electrodes [9]. Thermal analysis was done for the fabricated ridge-type LDs with an additional Au layer on the p-electrode, as shown in Figure 1. The additional Au layer was not really deposited on the p-electrode, but was just for the thermal analysis, and its thickness was varied from 0 to 20 μm.