Biography

Yeo Kiat Seng

Subjects: Electrical & Electronic Engineering View times: 158
Submitted by: Kiat Seng Yeo

Abstract

Professor Yeo Kiat Seng received the B.Eng. (EE) in 1993, and Ph.D. (EE) in 1996 both from Nanyang Technological University (NTU), Singapore. Currently, Yeo is Associate Provost (Research and International Relations), Singapore University of Technology and Design (SUTD). Before his appointment at SUTD, Yeo was Associate Chair (Research), Head of Division of Circuits and Systems, Sub-Dean (Student Affairs) and Founding Director of VIRTUS, IC Design Centre of Excellence at the School of Electrical and Electronic Engineering, NTU. Yeo is a widely known authority in low-power RF/mm-wave IC design and a recognized expert in CMOS technology. He was a Series Editor of “Emerging Technologies in Circuits and Systems”, author of 10 books, 7 book chapters and has over 600 top-tier refereed journal and conference papers in his area of research and holds 38 patents, including 2 patents for the world’s smallest integrated transformer, a patent for the world’s smallest integrated filter for 60GHz standard, the inventor of several high Q-factor RF spiral inductors and co-inventor of quite a few novel circuit techniques for 5G wireless communication and RF/mm-wave IC applications. His most popular books include “CMOS Millimeter-Wave Integrated Circuits for Next Generation Wireless Communication Systems” (World Scientific Publishing, 2019), “Low-Voltage, Low-Power VLSI Subsystems” (McGraw-Hill, New York, 2005), and “CMOS/BiCMOS ULSI: Low-Voltage, Low-Power” (Prentice Hall, 2002). The latter was translated to Chinese version and became an ever popular foreign textbook in China. Yeo is also the principal author of Integrated Circuit Design Research Ranking for Worldwide Universities 2008 and World University Research Rankings (WURR) 2020. He served in the editorial board of IEEE Transactions on Microwave Theory and Techniques and was one of the Guest Editors of Journal of Circuits, Systems and Computers on Green Integrated Circuits and Systems from 2008 to 2010 and on Energy and Variability Aware Circuits and Systems from 2011 to 2013. In addition, Yeo holds/held key positions in many international conferences as Advisor, General Chair, Co-General Chair and Technical Chair. In 2009, Yeo was awarded the Public Administration Medal (Bronze) on National Day by the President of the Republic of Singapore and the Nanyang Alumni Achievement Award by NTU for his outstanding contributions to the university and society. In 2020, he was conferred the Long Service Medal on National Day by the President of the Republic of Singapore. Yeo is an IEEE Fellow for his contributions to low-power integrated circuit design.

Biography[1]

Professor Yeo Kiat Seng, IEEE Fellow

Education

Yeo graduated with a Bachelor of Engineering Honours (Electrical Engineering) in 1993 and Doctor of Philosophy (Electrical Engineering) in 1996, both from Nanyang Technological University (NTU), Singapore.

Career

Yeo began his academic career in 1993 in Nanyang Technological University (NTU), Singapore’s School of Electrical and Electronic Engineering and taught circuits and systems, low-power integrated circuit design, visible light communications, CMOS technology, RF/mm-wave integrated circuit design, VLSI/ULSI design and memory. He was promoted to Professor in 2009. Yeo spent 13 years in management positions as Associate Chair (Research), Head of Circuits and Systems and Sub-Dean (Students Affairs) in NTU. He was also a Fellow of the Renaissance Engineering Programme (REP) and served as Senator and Advisory Board Member at NTU. Currently, he is Associate Provost (Research and International Relations), Singapore University of Technology and Design (SUTD). Yeo has about 30 years of experience in industry, academia and consultancy.

Currently, Yeo is a Council Member for the Singapore-Zhejiang Economic & Trade Council (SZETC), Singapore’s primary focal point for the Sub-committee on Microelectronics and IT (SCMIT) under the ASEAN Committee on Science, Technology and Innovation (COSTI), a Member of the Management Board of Temasek Laboratories at SUTD, the Republic Polytechnic’s (RP) Distinguished Academic, a Distinguished Visiting Academician to Changi General Hospital (CGH), a Member of the MIT-SUTD Collaboration Governing Board, a Member of Ngee Ann Polytechnic’s Expert Panel for School of Engineering, an Advisor to Hwa Chong Institution’s Board of Integrated Programme, a Member of SIA Engineering Company Technology Advisory Committee, a Member of Singapore Semiconductor Industry Association Complex Equipment Consortium, and an Editorial Board Member of Journal of Electronics/Circuit and Signal Processing. He has also contributed as Chairman, Co-Chair and Member of several national/society as well as industry/professional services. Yeo was a Member of Board of Advisors of the Singapore Semiconductor Industry Association, a Council Member of the Assembly & Test WSQ Framework Industry Skills and Training of the Singapore Workforce Development Agency, and Chairman of Engineering Science Advisory Committee at Ngee Ann Polytechnic.

Research

Yeo has an unquestionably prolific record of scholarships and is highly regarded as a leading authority in the field of low-power IC design (RF/mm-wave). He has a rare combination of modeling, design, fabrication and test knowledge and experience. As a result, his research has been multifaceted and highly innovative. His research achievements and contributions in IC design have been recognized in both academia and industry. Many of his publications have been shown to hold the benchmark for several low-power RF/mm-wave transceiver modules, filters and circuits. For example, his team was the first to propose the Transformed Radial Stubs to realize wideband low-pass filters. Based on a new filter topology, his team fabricated the world’s smallest on-chip low-pass filter (US Patent 9154104) with the broadest stop-band up to 52 times the cut-off frequency, i.e., 110GHz has been achieved. The measured pass-band insertion loss is less than 2.2 dB and its size is only 350μm by 280μm.

Yeo’s research combines both originality and depth to produce revolutionary results that have major practical ramifications for the electronics/semiconductor industry. He has been a technical consultant to several multinational companies such as Toshiba, Samsung, GLOBALFOUNDRIES and Sony. As a result of his excellent research track record, he has secured research funding of more than S$70m as Principal Investigator from various funding agencies and the industry since 2000. Apart from his outstanding research, Yeo is an excellent teacher who seeks to inspire and draw out the very best in his students. He has supervised more than 120 research fellows, postdocs as well as PhD and Master’s students, many of whom went on to emulate his spirit of innovation in academia and industry.

In 1997, Yeo established the first R&D facility in Asia to conduct a full range of RF/mm-wave research from characterization and modelling, design, simulation, test and measurement to verification, qualification and standardization. In 2009, he founded VIRTUS, a S$52m IC Design Centre of Excellence, jointly set up by NTU and Singapore Economic Development Board (EDB), to spearhead cutting edge IC design research for applications in medical technology, clean technology and consumer electronics. As the Founding Director of VIRTUS, Yeo contributed extensively to the economic development of integrated circuit design in Singapore by leading multidisciplinary research, with a focus on industry collaboration. With his exemplary leadership in IC design, NTU was ranked 16th in the world and among the top 3 in Asia in 2008 IC Design Research Ranking for Worldwide Universities.

One of the major global mega-trends sweeping the world recently is wireless communication solutions built in computers and IT applications. As Moore’s Law has passed its prime, it is getting harder to deliver performance. Energy considerations also pose stringent limits on the growth of applications, wherein portability and hence battery life are extremely important. Yeo’s team is one of the most successful research groups in the world to lead pioneering research and innovation in low-power mm-wave IC technology, and translate them into impactful solutions and commercial products. The VIRTUS’ 60GHz transceiver System-on-Chip can support a data rate of 1Gbps over a distance of 1,000m. It is also fully compliant with IEEE 802.11ad standard and can support video streaming up to 10m. The chip incorporates time division duplexing and operates in the unlicensed 57 to 66 GHz band. Special highlights include an unconventional 36G/24G front-end transceiver architecture with carrier suppression and ultra-low unwanted emissions (US Patent 9083437), and power amplifier and linearization techniques using active and passive devices (US Patent 9130511).

Future Research Directions

The Integrated Circuit (IC) design process is one of the most complex and resource intensive processes in the design field. The time taken to design and validate the IC design can take months and the design of mixed-signal/RF/mm-wave ICs is usually a laborious process.

With the adventures in Artificial Intelligence (AI), the time has come to use AI technology to develop a common IC design knowledge database. This Intellectual Property (IP) database will be used to develop intelligent methodologies to accelerate and automate the IC design process, IC chip manufacturing process and eventually democratize IC chip design.

AI techniques are only as good as the data they are trained with. However, data from previous designs may not be enough for AI to perform the necessary design operation and optimization. There is also real-time data. But real-time learning can be challenging because when something goes wrong we have to be able to debug, recover and repair the streaming data. Hence, my future research direction is to develop an AI-enabled electronic IC design smart database that will:

  1. Learn the well-defined IC design parameter space: establish experimentally tested numerical libraries for this parameter space.
  2. Create AI based Product Development Kit (PDK).
  3. Explore AI generated device geometries for better performance, low power, low losses and new functionalities.
  4. Demonstrate footprint reduction, auto-placement of devices while minimizing losses.
  5. Accelerate of numerical simulation with deep learning based meta-models.
  6. Create platform for AI assisted computational optical lithography.
  7. Develop a new digital system based on probabilistic nanoelectronics, in contrast to conventional design of digital systems wherein the individual computing elements are deemed to work correctly all the time.

Awards & Honours

In 2009, Yeo was awarded the Public Administration Medal (Bronze) [PINGAT PENTADBIRAN AWAM (GANGSA)] on National Day by the President of the Republic of Singapore for his outstanding efficiency, competence and industry and NTU’s Nanyang Alumni Achievement Award in recognition of his exemplary achievements in research.

In 2012, Yeo received the Singapore Infocomm Technology Federation (SiTF) 2012 'Special Mention' Award under Emerging Technologies Category Awards for Singapore’s Next Generation WiFi Chipset. He was conferred IEEE Fellow in 2016 for his contributions to low-power integrated circuit design.

In 2020, he was conferred the Long Service Medal (Pingat Bakti Setia) on National Day by the President of the Republic of Singapore.

Selected Patents

[1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22]

Selected Books

[23][24][25][26][27][28][29][30][31][32]

Selected Journal Papers

[33][34][35][36][37][38][39][40][41][42][43][44][45][46][47][48][49][50][51][52][53][54][55][56][57][58][59][60][61][62][63][64][65][66][67][68][69][70][71][72][73][74][75][76][77][78][79][80][81][82][83][84][85][86]

Selected Conference Papers

[87][88][89][90][91][92][93][94][95][96][97][98][99][100][101][102][103][104][105][106][107][108]

Others

[109][110][111][112]

References

  1. Yeo Kiat Seng, Chan Kok Lim, Do Manh Anh, Ma Jian Guo, and Chew Kok Wai, “Technique to Generate Negative Conductance in CMOS Tuned Cascode RF Amplifiers”, US Patent No.: 6292060, September 18, 2001.
  2. Do Manh Anh, Zhao Ruiyan, Ma Jian Guo, Yeo Kiat Seng, and Chew Kok Wai, “A New Wideband/Multi-Band CMOS Voltage Controlled Oscillator”, US Patent No.: 6417740, July 9, 2002.
  3. Yeo Kiat Seng, Geng Chunqi, Chew Kok Wai, Do Manh Anh, and Ma Jian Guo, “High Performance Integrated Varactor on Silicon”, US Patent No.: 6521939, February 18, 2003.
  4. Yeo Kiat Seng, Tan Hai Peng, Ma Jian Guo, Do Manh Anh, and Chew Kok Wai, “Integrated Helix Coil Inductor on Silicon”, US Patent No.: 6535098, March 18, 2003.
  5. Yeo Kiat Seng, Tan Hai Peng, Ma Jian Guo, Do Manh Anh, and Chew Kok Wai, “Integrated Vertical Spiral Inductor on Semiconductor Material”, US Patent No.: 6811188, August 26, 2003.
  6. Sia Choon-Beng, Yeo Kiat Seng, Swe Toe Naing, Ng Cheng Yeow, and Alex See, “Parallel Spiral Stacked Inductor on Semiconductor Material”, US Patent No.: 6650220, November 18, 2003.
  7. Sia Choon-Beng, Yeo Kiat Seng and Sanford Chu, “Silicon-Based Inductor with Varying Metal-to-Metal Conductor Spacing”, US Patent No.: 6714112, March 30, 2004.
  8. Sia Choon-Beng, Yeo Kiat Seng, Sanford Chu, Lap Chan and Chew Kok Wai, “Low Noise Inductor Using Electrically Floating High Resistive and Grounded Low Resistive Patterned Shield”, US Patent No.: 6777774, August 17, 2004.
  9. Yeo Kiat Seng, Tan Hai Peng, Ma Jian Guo, Do Manh Anh, and Chew Kok Wai, “Integrated Helix Coil Inductor on Silicon”, US Patent No.: 6803848, October 12, 2004.
  10. Sia Choon-Beng, Yeo Kiat Seng, Sanford Chu, Ng Cheng Yeow, Chew Kok Wai, and Goh Wang Ling, “3-D Spiral Stacked Inductor on Semiconductor Material”, US Patent No.: 6841847, January 11, 2005.
  11. Yeo Kiat Seng, Tan Hai Peng, Ma Jian Guo, Do Manh Anh, and Chew Kok Wai, “High Performance RF Inductors and Transformers Using Bonding Technique”, US Patent No.: 7023315, April 4, 2006.
  12. Lim Chee Chong, Chew Kok Wai, Yeo Kiat Seng, Lim Suh Fei, Do Manh Anh, and Chan Lap, “Integrated Transformer and Method of Fabrication Thereof”, US Patent No.: 7570144, August 4, 2009.
  13. Qiu Ping, Boon Chirn Chye, Chew Kok Wai, Yeo Kiat Seng, Do Manh Anh, Chan Lap, and Lim Suh Fei, “Tunable High Quality Factor Inductor”, US Patent No.: 8237531, August 7, 2012.
  14. Lim Chee Chong, Chew Kok Wai, Yeo Kiat Seng, Lim Suh Fei, Do Manh Anh, and Chan Lap, “Transformer with Effective High Turn Ratio”, US Patent No.: 8242872, August 14, 2012.
  15. Kiat Seng Yeo, and Jian Guo Ma, “A Front-End Transceiver”, US Patent No.: 9083437, July 14, 2015.
  16. Kaixue Ma, Gu Jiangmin, Jian-Guo Ma, Yang Lu, and Kiat Seng Yeo, “Power Amplifier and Linearization Techniques Using Active and Passive Devices”, US Patent No.: 9130511, September 8, 2015.
  17. Kaixue Ma, Shouxian Mou, and Kiat Seng Yeo, “Miniaturized Passive Low Pass Filter”, US Patent No.: 9154104, October 6, 2015.
  18. Ma Kai Xue, Mahalingam Nagarajan, Mou Shouxian, Yeo Kiat Seng, “Integrated Circuit Architecture with Strongly Coupled LC Tanks”, US Patent No.: 9331659, May 3, 2016.
  19. Kaixue Ma, Yang Lu, Jiangmin Gu, and Kiat Seng Yeo, “Miniature Passive Structures for ESD Protection and Input and Output Matching”, US Patent No.: 9337157, May 10, 2016.
  20. Ma Kai Xue, Lim Kok Meng, Yeo Kiat Seng, and Ma Jian-Guo, “Multiple-Mode Filter for Radio Frequency Integrated Circuits”, US Patent No.: 9373876, June 21, 2016.
  21. Ma Kai Xue, Wang Keping, and Yeo Kiat Seng, “Miniature Passive Structures, High Frequency Electrostatic Discharge Protection Networks, and High Frequency Electrostatic Discharge Protection Schemes”, US Patent No.: 9496253, November 15, 2016.
  22. Ma Kai Xue, Mou Shouxian, and Yeo Kiat Seng, “Switching Circuit”, US Patent No.: 9831866, November 28, 2017.
  23. Samir S. Rofail, and Yeo Kiat Seng, “Low-Voltage Low-Power Digital BiCMOS Circuits: Circuit Design, Comparative Study and Sensitivity Analysis”, Prentice-Hall, Upper Saddle River, New Jersey 07458, Professional Technical Reference, International Edition, 2000. ISBN 0-13-011380-8, December 2000.
  24. Yeo Kiat Seng, Samir S. Rofail and Goh Wang Ling, “CMOS/BiCMOS ULSI: Low-Voltage Low-Power”, Prentice-Hall, Upper Saddle River, New Jersey 07458, Professional Technical Reference, International Edition, ISBN 0-13-032162-1, December 2002.
  25. Yeo Kiat Seng, Samir S. Rofail, and Goh Wang Ling, “CMOS/BiCMOS ULSI: Low-Voltage Low-Power”, (Chinese Edition) Prentice-Hall, ISBN 7-5053-8712-X, December 2003.
  26. Yeo Kiat Seng, and Kaushik Roy, “Low Voltage, Low Power VLSI Subsystems”, McGraw-Hill, New York, International Edition, 2005. ISBN 0-07-143786-X, December 2005.
  27. Yeo Kiat Seng, Ng Kim Tean, Kong Zhi Hui, and Tricia Dang Bee Yoke, “Intellectual Property for Integrated Circuits”, J. Ross Publishing (USA), International Edition, no. of pages 216, ISBN 978-1-932159-85-1, January 2010.
  28. Yeo Kiat Seng, Do Manh Anh, and Boon Chirn Chye, “Design of CMOS RF Integrated Circuits and Systems”, World Scientific Publishing (Singapore), International Edition, no. of pages 360, ISBN 978-981-4271-55-4, 981-4271-55-1, March 2010.
  29. Fanyi Meng, Kaixue Ma, and Kiat Seng Yeo, “Millimeter-Wave IC Design Techniques for Beam-Forming Applications”, LAP Lambert Academic Publishing, ISBN 3330022353, December 15, 2016.
  30. Kaixue Ma, and Kiat Seng Yeo, “Low-Power Wireless Communication Circuits and Systems: 60GHz and Beyond”, Pan Stanford Publishing, ISBN 9789814745963 - CAT# N11848, April 26, 2018.
  31. Kiat Seng Yeo, Chirn Chye Boon, Xiang Yi, and Fanyi Meng, “CMOS Millimeter-Wave Integrated Circuits for Next Generation Wireless Communication Systems”, World Scientific Publishing (Singapore), International Edition, 2019.
  32. Kiat Seng Yeo, Zhiren Yang, and Andy Chan, “Research Assessment Framework for Global Universities 2020”, World Scientific Publishing, no. of pages 88, ISBN: 978-981-122-952-7, 978-981-122-958-9, September 2020. https://worldscientific.com/worldscibooks/10.1142/12078
  33. Anh-Tuan Do, Shoushun Chen, Zhi-Hui Kong, and Kiat-Seng Yeo, “A High Speed Low Power CAM with a Parity Bit and Power-Gated ML Sensing”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 21, no. 1, pp. 151-156, January 2013.
  34. Deyun Cai, Haipeng Fu, Junyan Ren, Wei Li, Ning Li, Hao Yu, and Kiat Seng Yeo, “A Dividerless PLL with Low Power and Low Reference Spur by Aperture-Phase Detector and Phase-to-Analog Converter”, IEEE Transactions on Circuits and Systems I (TCAS-I), vol. 60, no. 1, pp. 37-50, January 2013.
  35. Wei Fei, Hao Yu, Yang Shang, and Kiat Seng Yeo, “A 2-D Distributed Power Combining by Metamaterial-Based Zero Phase Shifter for 60GHz Power Amplifier in 65nm CMOS”, IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 1, pp. 505-516, January 2013.
  36. Loo X. S., Yeo K. S., Chew K. W. J., Chan L. H. K., Ong S. N., Do M. A., and Boon C. C., “A New Millimeter-Wave Fixture De-Embedding Method Based on Generalized Cascade Network Model”, IEEE Electron Device Letters, vol. 34, no. 3, pp. 447-449, March 2013.
  37. Ma Kaixue, Mou Shouxian, and Yeo Kiat Seng, “A Miniaturized Millimeter-Wave Standing-Wave Filtering Switch with High P1dB”, IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 4, pp. 1505-1515, April 2013.
  38. Yang Shang, Hao Yu, Deyun Cai, Junyan Ren, and Kiat Seng Yeo, “Design of High-Q Millimeter-Wave Oscillator by Differential Transmission Line Loaded with Metamaterial Resonator in 65nm CMOS”, IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 5, pp. 1892-1902, May 2013.
  39. Thangarasu Bharatha Kumar, Kaixue Ma, and Kiat Seng Yeo, “Temperature Compensated dB-linear Digitally Controlled Variable Gain Amplifier with DC Offset Cancellation”, IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 7, pp. 2648-2661, July 2013.
  40. Chun Kit Lam, Meng Tong Tan, Stephen M. Cox, Kiat Seng Yeo, “Class-D Amplifier Power Stage with PWM Feedback Loop", IEEE Transactions on Power Electronics, vol. 28, no. 8, pp. 3870-3881, August 2013.
  41. Chen Dandan, Yeo Kiat Seng, Shi Xiaomeng, Do Manh Anh, Boon Chirn Chye, and Lim Wei Meng, “Cross-Coupled Current Conveyor Based CMOS Transimpedance Amplifier for Broadband Data Transmission”, IEEE Transactions on Very Large Scale Intergration (VLSI) Systems, vol. 21, no. 8, pp. 1516-1525, August 2013.
  42. Kaixue Ma, Shouxian Mou, and Kiat Seng Yeo, “Miniaturized 60GHz On-Chip Multimode Quasi-Elliptical Bandpass Filter”, IEEE Electron Device Letters, vol. 34, no. 8, pp. 945-947, August 2013.
  43. Loo Xi Sung, Yeo Kiat Seng, and Chew Kok Wai J., “THRU-Based Cascade De-Embedding Technique for On-Wafer Characterization of RF CMOS Devices”, IEEE Transactions on Electron Devices, vol. 60, no. 9, pp. 2892-2899, September 2013.
  44. Ma Kaixue, Mou Shouxian, Wang Keping, and Yeo Kiat Seng, “Embedded Transformed Radial Stub Cell for BPF with Spurious-Free above Ten Octaves”, IEEE Transactions on Components Packaging and Manufacturing Technology, vol. 3, no. 9, pp. 1597-1603, September 2013.
  45. Hao Yu, Wei Fei, Haipeng Fu, Junyan Ren, and Kiat Seng Yeo, “Design and Analysis of Wide Frequency-Tuning-Range CMOS 60GHz VCO by Switching Inductor Loaded Transformer”, IEEE Transactions on Circuits and Systems I, vol. PP, no. 99, pp. 1-13, October 2013.
  46. Nagarajan Mahalingam, Ma Kaixue, Yeo Kiat Seng, and Lim Wei Meng, “K-band High-PAE Wide-Tuning-Range VCO Using Triple-Coupled LC Tanks”, IEEE Transactions on Circuits and Systems II, vol. 60, no. 11, pp. 736-740, November 2013.
  47. M. Nagarajan, Kaixue Ma, and Kiat Seng Yeo, “A K-Band High PAE Wide Tuning Range VCO Using Triple-Coupled LC Tanks”, IEEE Transactions on TCAS-II, vol. 60, no. 11, pp. 736-740, November 2013.
  48. Chen Feng, Xiao Peng Yu, Wei Meng Lim, and Kiat Seng Yeo, “A Compact 2.1-39GHz Self-Biased Low-Noise Amplifier in 65nm CMOS Technology”, IEEE Microwave and Wireless Components Letters, vol. 23, no. 12, pp. 662-664, December 2013.
  49. Xiao Peng Yu, Zheng Hao Lu, Bo Yu Hu, Wei Meng Lim, Er Tai Duo, and Kiat Seng Yeo, “A 12mW 40-60GHz 0.18um BiCMOS Oscillator-Less Self-Demodulator for Short-Range Software-Defined Transceivers”, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 3, no.4, pp. 521-530, December 2013.
  50. F. Meng, Kaixue Ma, K. S. Yeo, Shanshan Xu, Chirn Chye Boon, and Wei Meng Lim, “Miniaturized 3-bit Phase Shifter for 60GHz Phased-Array in 65nm CMOS Technology”, IEEE MWCL, vol.24, no.1, pp.50-52, January 2014.
  51. N. Mahalingam, Kaixue Ma, and Kiat Seng Yeo, “Coupled Dual LC Tanks Based ILFD with Low Injection Power and Compact Size”, IEEE MWCL, vol.24, no.2, pp. 105-107, February 2014.
  52. Wei Fei, Hao Yu, Haipeng Fu, Junyan Ren, and Kiat Seng Yeo, “Design and Analysis of Wide Frequency-Tuning-Range CMOS 60GHz VCO by Switching Inductor Loaded Transformer”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 61, no. 3, pp. 699-711, March 2014.
  53. Kaixue Ma, Ningning Yan, Kiat Seng Yeo, and Wei Meng Lim, “Miniaturized 40-60GHz On-Chip Balun with Capacitive Loading Compensation”, IEEE Electron Device Letters, vol. 35, no. 4, pp. 434-436, April 2014.
  54. D. Anh Tuan, Y. Chun, K. Velayudhan, L. Zhao Chuan, Y. Kiat Seng, and T. T. H. Kim, “0.77 fJ/bit/Search Content Addressable Memory Using Small Match Line Swing and Automated Background Checking Scheme for Variation Tolerance”, IEEE Journal of Solid-State Circuits, vol. 49, no. 7, pp. 1487-1498, July 2014.
  55. Wen Lin Xu, Xiao Peng Yu, Wei Meng Lim, and Kiat Seng Yeo, “Design and Optimization of a Millimeter-Wave Amplifier Using Nano-Scale CMOS Devices”, Nanoscience and Nanotechnology Letters, vol. 6, no. 9, pp. 805-811, September 2014.
  56. Shih Ni Ong, Kiat Seng Yeo, Chew, K.W.J., and Chan, L.H.K., “Substrate-Induced Noise Model and Parameter Extraction for High-Frequency Noise Modeling of Sub-Micron MOSFETs”, IEEE Transactions on Microwave Theory and Techniques, vol. 62, no. 9, pp. 1973-1985, September 2014.
  57. Boyu Hu, Xiao Peng Yu, Wei Meng Lim, and Kiat Seng Yeo, “Analysis and Design of Ultra-Wideband Low-Noise Amplifier with Input/Output Bandwidth Optimization and Single-Ended/Differential-Input Reconfigurability”, IEEE Transactions on Industrial Electronics, vol. 61, no. 10, pp. 5672-5680, October 2014.
  58. Kumar, T.B., Kaixue Ma, Kiat Seng Yeo, and Wanlan Yang, “A 35-mW 30-dB Gain Control Range Current Mode Linear-in-Decibel Programmable Gain Amplifier with Bandwidth Enhancement”, IEEE Transactions on Microwave Theory and Techniques, vol. 62, no. 12, pp. 3465-3475, December 2014.
  59. Chan, L.H.K., Kiat Seng Yeo, Chew, K.W.J., and Shih Ni Ong, “High-Frequency Noise Modeling of MOSFETs for Ultra Low-Voltage RF Applications”, IEEE Transactions on Microwave Theory and Techniques, vol. 63, no. 1, pp. 141-154, January 2015.
  60. Chen Feng, Xiao Peng Yu, Wei Meng Lim, and Kiat Seng Yeo, “A 40GHz 65nm CMOS Phase-Locked Loop with Optimized Shunt-Peaked Buffer”, IEEE Microwave and Wireless Components Letters, vol. 25, no. 1, pp. 34-36, January 2015.
  61. Jiang-An Han, Zhi-Hui Kong, Kaixue Ma, and Kiat Seng Yeo, “A 26.8 dB Gain 19.7 dBm CMOS Power Amplifier Using 4-way Hybrid Coupling Combiner”, IEEE Microwave and Wireless Components Letters, vol. 25, no. 1, pp. 43-45, January 2015.
  62. Kumar, T.B., Kaixue Ma, and Kiat Seng Yeo, “A 4GHz 60 dB Variable Gain Amplifier with Tunable DC Offset Cancellation in 65nm CMOS”, IEEE Microwave and Wireless Components Letters, vol. 25, no. 1, pp. 37-39, January 2015.
  63. Qiong Zou, Kaixue Ma, and Kiat Seng Yeo, “A Low Phase Noise and Wide Tuning Range Millimeter-Wave VCO Using Switchable Coupled VCO-Cores”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, no .2, pp. 554-563, February 2015.
  64. Xu S., Ma K., Meng F., and Yeo K.S., “Novel Defected Ground Structure and Two-Side Loading Scheme for Miniaturized Dual-Band SIW Bandpass Filter Designs”, IEEE Microwave and Wireless Components Letters, vol. 25, no. 4, pp. 217-219, April 2015.
  65. Mahalingam N., Ma K., Yeo K.S., and Lim W.M., “Modified Inductive Peaking Direct Injection ILFD with Multi-Coupled Coils”, IEEE Microwave and Wireless Components Letters, vol. 25, no. 6, pp. 379-381, June 2015.
  66. W. Yang, K. Ma, K. S. Yeo, and W. M. Lim, “A Compact High-Performance Patch Antenna Array for 60GHz Applications”, IEEE Antennas and Wireless Propagation Letters, vol. 15, no. 6, pp. 313-316, June 2015.
  67. Fanyi Meng, Kaixue Ma, Kiat Seng Yeo, Chirn Chye Boon, Wei Meng Lim, and Shanshan Xu, “A 220-285GHz SPDT Switch in 65nm CMOS Using Switchable Resonator Concept”, IEEE Transactions on Terahertz Science and Technology, vol. 5, no. 4, pp. 649-651, July 2015.
  68. L. Lu, K. Ma, F. Meng, and K. S. Yeo, “Design of a 60GHz Quasi-Yagi Antenna with Novel Ladder-Like Directors for Gain and Bandwidth Enhancements”, IEEE Antennas and Wireless Propagation Letters, vol. 15, no. 8, pp. 682-685, August 2015.
  69. Wanxin Ye, Kaixue Ma, Kiat Seng Yeo, and Qiong Zou, “A 65nm CMOS Power Amplifier with Peak PAE above 18.9% from 57 to 66GHz Using Synthesized Transformer-Based Matching Network”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, no. 10, pp. 2533-2543, October 2015.
  70. K. Ma, T. B. Kumar, and K. S. Yeo, “A Reconfigurable K-/Ka-Band Power Amplifier with High PAE in 0.18 µm SiGe BiCMOS for Multi-Band Applications”, IEEE Transactions on Microwave Theory and Techniques (TMTT), vol. 63, no. 12, pp. 4395-4405, December 2015.
  71. F. Meng, K. Ma, and K. S. Yeo, et al., “A 57-to-64-GHz 0.094-mm2 5-bit Passive Phase Shifter in 65nm CMOS”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 5, pp. 1917-1925, May 2016.
  72. X. S. Loo, K. W. J. Chew, and K. S. Yeo, et al., “A Hybrid Pad-Line-Finger De-Embedding Technique for Broadband Modeling of CMOS Transistor”, IEEE Microwave and Wireless Components Letters, vol. 26, no. 7, pp. 507-509, July 2016.
  73. F. Meng, K. Ma, and K. S. Yeo, et al., “A Compact 57-67GHz Bidirectional LNAPA in 65nm CMOS Technology”, IEEE Microwave and Wireless Components Letters, vol. 26, no. 8, pp. 628-630, August 2016.
  74. J. A. Han, Z. H. Kong, K. Ma, K. S. Yeo, and W. M. Lim, “Wideband Millimetre-Wave CMOS Power Amplifier Using Transistor-Based Inductive Source Degeneration and Specially Shielded Transformer”, IET Microwaves, Antennas & Propagation September 2016.
  75. Bo Yu, Kaixue Ma, Fanyi Meng, Kiat Seng Yeo, Parthasarathy Shyam, Shaoqiang Zhang, and Purakh Raj Verma, “DC-30GHz DPDT Switch Matrix Design in High Resistivity Trap-Rich SOI”, IEEE Transactions Electron Devices, vol. 64, no. 9, pp. 3548-3554, September 2017.
  76. Bo Yu, Kaixue Ma, Fanyi Meng, Kiat Seng Yeo, Parthasarathy Shyam, Shaoqiang Zhang, and Purakh Raj Verma, “Ultra Wideband Low Loss Switch Design in High Resistivity Trap-Rich SOI with Enhanced Channel Mobility”, IEEE Transactions on Microwave Theory and Techniques, vol. 65, no.10, pp. 3937-3949, October 2017.
  77. N. Mahalingam, Y. Wang, K. Ma, B. K. Thangarasu, and K. S. Yeo, “A 30GHz Power Efficient Phase-Locked Loop Frequency Synthesizer for 60GHz Applications”, IEEE Transactions on Microwave Theory and Techniques, vol. 65, issue 11, pp. 4165-4175, November 2017.
  78. Fanyi Meng, Kaixue Ma, Kiat Seng Yeo, and Shanshan Xu, “Monolithic Sub-Terahertz SPDT Switches with Low Insertion Loss and Enhanced Isolation”, IEEE Transactions on Terahertz Science and Technology, vol. 8, no.2, pp. 192-200, March 2018.
  79. Q. Zou, K. Ma, and K. S. Yeo, “A V-Band Wide Locking Range Divide-by-4 Injection-Locked Frequency Divider”, IEEE Microwave and Wireless Components Letters, vol. 28, no. 11, pp. 1020-1022, November 2018.
  80. P. S. Chew, K. Ma, Z. H. Kong and K. S. Yeo, “Miniaturized Wideband Coupler for 60GHz Band in 65nm CMOS Technology”, IEEE Microwave and Wireless Components Letters, vol. 28, no. 12, pp. 1089-1091, December 2018.
  81. Nagarajan Mahalingam, Kaixue Ma, and Kiat Seng Yeo, “A Multi-Mode Multi-Coil Coupled Tuned Inductive Peaking ILFD for Low Injected Power with Compact Size”, IEEE Access, vol. 7, no. 5, pp. 59059-59068, May 2019.
  82. Lu Zhenghao, Song Xiong, Yu Xiaopeng, Yeo Kiat Seng and Cher Jer-Ming, “A Wideband dB-Linear VGA with Temperature Compensation and Active Load”, IEEE Transactions on Circuits and Systems - I: Regular Papers, vol. 66, no. 9, pp. 3279-3287, September 2019.
  83. Mei Yu Soh, Wen Xian Ng, Tee Hui Teo, S. Lawrence Selvaraj, Lulu Peng, Don Disney, Qiong Zou, and Kiat Seng Yeo, “Design and Characterization of Micro LED Matrix Display with Heterogeneous Integration of GaN and BCD Technologies”, IEEE Transactions on Electron Devices, vol. 66, no. 10, pp. 4221-4227, October 2019.
  84. Hang Liu, Xi Zhu, Muting Lu, Yichuang Sun, and Kiat Seng Yeo, “Design of Reconfigurable dB-Linear Variable-Gain Amplifier and Switchable-Order Gm-C Filter in 65nm CMOS Technology”, IEEE Transactions on Microwave Theory and Techniques, vol. 67, no. 12, pp. 5148-5158, December 2019.
  85. Yun Fang, Zhong TANG, Xiao-Peng Yu, Zheng Shi, and Kiat Seng Yeo, “A Reliability-Oriented Startup Analysis of Injection-Locked Frequency Divider Based on Broken Symmetry Theory”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 27, no. 12, pp. 2954-2958, December 2019.
  86. L. Kong, H. Liu, X. Zhu, C. C. Boon, C. Li, Z. Liu, and K. S. Yeo, “Design of a Wideband Variable-Gain Amplifier with Self-Compensated Transistor for Accurate dB-Linear Characteristic in 65nm CMOS Technology”, IEEE Transactions on Circuits and Systems I - Regular Papers, 2020.
  87. W. Ye, K. Ma, and K. S. Yeo, “A 2-to-6GHz Class-AB Power Amplifier with 28.4% PAE in 65nm CMOS Supporting 256QAM”, Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2015 IEEE International, February 22-26, 2015 (ISSCC is known as the “Chip Olympics”).
  88. F. Meng, K. Ma, and K. S. Yeo, “A 130-to-180GHz 0.0035mm2 SPDT Switch with 3.3dB-Loss and 23.7dB-Isolation in 65nm Bulk CMOS”, Solid-State Circuits Conference Digest of Technical Papers (ISSCC), pp. 34-36, February 22-26, 2015 (World’s first CMOS switch paper published in ISSCC. ISSCC is known as the “Chip Olympics”).
  89. Keping Wang, Kaixue Ma, and Kiat Seng Yeo, “V-Band High Gain SiGe Power Amplifier with Wideband ESD Protection”, Wireless Symposium (IWS), 2015 IEEE International, pp.1-4, March 30 - April 1, 2015.
  90. B. K. Thangarasu, K. Ma, and K. S. Yeo, “A Low Power Programmable Gain High PAE K-/Ka-Band Stacked Amplifier in 0.18 μm SiGe BiCMOS Technology”, IEEE MTT-S International Microwave Symposium Digest (IMS 2015), Phoenix, AZ, May 16-23, 2015.
  91. K. Ma, K. S. Yeo, S.X. Mou, and N. Mahalingam, et. al, “A Fully Integrated 60GHz Dual-Chip Wireless Solution for IEEE802.11ad Applications”, IEEE MTT-S International Microwave Symposium Digest, Phoenix, Arizona, USA, pp. 1-3, May 17-22, 2015.
  92. Zeinolabedin, S.M.A., Anh Tuan Do, Kiat Seng Yeo, and Tony Tae-Hyoung Kim, “Design of a Hybrid Neural Spike Detection Algorithm for Implantable Integrated Brain Circuits”, 2015 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 794-797, May 24-27, 2015.
  93. Anh Tuan Do, Kiat Seng Yeo, and Kim T.T.H., “A 32kb 9T SRAM with PVT-Tracking Read Margin Enhancement for Ultra-Low Voltage Operation”, 2015 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2553-2556, May 24-27, 2015.
  94. N. Mahalingam, Yisheng Wang, B. K. Thangarasu, K. Ma, K. S. Yeo, and Yung Sern Tan, “A Multi-Mode 30GHz 2 Degree RMS Power Efficient Phase-Locked Loop Frequency Synthesizer”, 2016 IEEE MTT-S International Microwave Symposium (IMS), San Francisco, CA, pp. 1-4, May 22-27, 2016.
  95. T. B. Kumar, K. Ma, and K. S. Yeo, “A 0.029mm 2 8 Gbit/s Current-Mode AGC Amplifier with Reconfigurable Closed-Loop Control in 65nm CMOS”, IEEE MTT-S International Microwave Symposium Digest (IMS 2017), Honolulu, Hawaii, June 4-6, 2017.
  96. Mei Yu Soh, T. Hui Teo, Wen Xian Ng, and Kiat Seng Yeo, “Review of High Efficiency Integrated LED Lighting”, IEEE 12th International Conference on Power Electronics and Drive Systems (PEDS 2017), Honolulu, USA, December 12-15, 2017.
  97. N. Mahalingam, K. S. Yeo and B. K. Thangarasu, “A Wide Locking Range Harmonic Enhanced Injection Locked Frequency Divide-by-4 with Low Injected Power Level (Invited)”, 2018 IEEE MTT-S International Wireless Symposium (IWS), Chengdu, May 6-10, 2018.
  98. Xi Sung Loo, Moe Z. Win, and Kiat Seng Yeo, “fT Enhancement of CMOS Transistor Using Isolated Polysilicon Gates”, IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2018), Philadelphia, Pennsylvania, USA, pp. 76-79, June 10-12 2018.
  99. N. Mahalingam, K. Ma, and K.S. Yeo, “A Multi-Mode Compact Size Multi-Coil Tuned Inductive Peaking ILFD for Low Injected Power Level”, 2018 IEEE International Microwave Symposium Digest (IMS 2018), Philadelphia, Pennsylvania, USA, June 10-15, 2018.
  100. Xi Sung Loo, Moe Z. Win, and Kiat Seng Yeo, “Miniature Wind Energy Harvester Based on Voltage Multipliers”, 2018 IEEE 9th International Symposium on Power Electronics for Distributed Generation Systems (PEDG 2018), Charlotte, North Carolina, USA, pp. 1-5, June 25-28, 2018.
  101. Mei Yu Soh, Wen Xian Ng, Qiong Zou, Denise Lee, Tee Hui Teo and Kiat Seng Yeo, “Real-Time Audio Transmission Using Visible Light Communication,” 2018 IEEE Region 10 Conference (IEEE TENCON 2018), Ramada Plaza Hotel, Jeju Island, Korea, October 28-31, 2018 (Best Paper Award).
  102. Lee Bai Song Samuel, Thangarasu Bharatha Kumar, Zou Qiong, and Yeo Kiat Seng, “An Inductorless Differential Transimpedance Amplifier Design for 5GHz Optical Communication Using 0.18-μm CMOS”, Session 56-1, 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, Sheraton Huangdao Hotel, Qingdao, China, October 31 - November 3, 2018 (Invited Paper).
  103. Xi Sung Loo, Moe Z. Win, and Kiat Seng Yeo, “Millimeter-Wave Sine Corrugated Fermi Tapered Slot Antenna Array Based on Partial Synthesized Dielectric”, 2019 IEEE Radio and Wireless Symposium (RWS), Orlando, FL, USA, pp. 1-4, January 20-23, 2019.
  104. B. S. Lee, H. Liu, and K. S. Yeo, “An Inductorless 6GHz Variable Gain Differential Transimpedance Amplifier in 0.18-um SiGe BiCMOS”, IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, May 26-29, 2019.
  105. Shanshan Xu, Fanyi Meng, Kaixue Ma, and Kiat Seng Yeo, “Dual-band Bandpass Filter Design with Novel Double-layer Mixed Coupled SIR/CPW-SIR Resonators”, 2019 IEEE MTT-S International Microwave Symposium (IMS), Boston, Massachusetts, USA, June 2-7, 2019.
  106. Hang Liu, Xi Zhu, Muting Lu, and Kiat Seng Yeo, “Design of a Voltage-Controlled Programmable-Gain Amplifier in 65nm CMOS Technology”, 2019 IEEE MTT-S International Microwave Symposium (IMS), Boston, Massachusetts, USA, June 2-7, 2019.
  107. Xi Sung Loo, Kiat Seng Yeo, Moe Z. Win, Zhichao Li, Xiaopeng Yu, and Jer-Ming Chen, “A K-Band Differential SiGe Stacked Power Amplifier Based on Capacitive Compensation Techniques for Gain Enhancements”, 62nd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Dallas, TX, USA, pp. 295-298, August 4-7, 2019.
  108. Hang Liu, Xi Zhu, Yisheng Wang, Kai Men, and Kiat Seng Yeo, “A 60GHz Edge-Coupled 4-Way Balun Power Amplifier with 22.7dBm Output Power and 27.7% Peak Efficiency”, IEEE Radio Frequency Integrated Circuits Symposium, Los Angeles Convention Center, Los Angeles, California, USA, June 21-23, 2020.
  109. Yeo Kiat Seng, “Gigabit Wireless Wideband for 5G Applications”, Singapore Semiconductor Industry Association (SSIA), Singapore Semiconductor Voice Magazine, vol. 3, pp. 20-21, 2019. https://ssia.org.sg/voice-past-issues/
  110. Yeo Kiat Seng, “AI-Enabled Electronic Integrated Circuit Design”, Singapore Semiconductor Industry Association (SSIA), Singapore Semiconductor Voice Magazine, vol. 4, pp. 32-34, 2019. https://ssia.org.sg/voice-past-issues/
  111. Yeo Kiat Seng, “Develop World’s 1st AI-Driven IC Design Internet Platform with SUTD”, Singapore Semiconductor Industry Association (SSIA), Singapore Semiconductor Voice Magazine, vol. 4, pp. 8, 2019. https://ssia.org.sg/voice-past-issues/
  112. Yeo Kiat Seng, and Lynn Chew, “COVID-19 - A Glimpse of SUTD's Business Continuity Plan”, Singapore Semiconductor Industry Association (SSIA), Singapore Semiconductor Voice Magazine, vol. 7, pp. 20-21, 2020. https://ssia.org.sg/voice-past-issues/